Datasheet Integra Technologies IGT5259L50 — Datenblatt

Part Number: Integra IGT5259L50 TECHNOLOGIES, INC. C-Band Radar 50Ω Transistor -GaN
в–  GaN on SiC HEMT Technology
в–  POUT-PK = 50W @ 1ms/15%/50V
в–  5.2-5.9GHz Instantaneous Operating Frequency Range
■ 50Ω Internally Impedance Matched Device
в–  Depletion Mode Device
в–  Negative Gate Voltage and Bias Sequencing Required
в–  Metal Based Package Sealed With Ceramic-Epoxy Lid
в–  Gold Metallization System: Chip -Wire Bond -Package
■ Package Size: W=0.800″(20.32mm), L=0.400″(10.16mm)
■ 100% High Power RF Tested in 50Ω RF Test Fixture PARAMETER SYM MIN Drain Leakage Current ID-OFF -Gate Threshold Voltage VGS-TH -Input Return Loss IRL -18 Power Gain Gp Drain Efficiency ND TYP MAX UNITS TEST CONDITIONS -1 mA -2.3 -V VDS=50V, ID=100mA, TF1, BD -10 -7 dB POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 13.0 14.0 15.0 dB POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 38 43 60 % POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 DC ELECTRICAL SPECIFICATIONS
VDS=50V, VGS= -6V, TF1, S1 RF ELECTRICAL SPECIFICATIONS Pulse Amplitude Droop
Delta Insertion Phase Variation
Load Mismatch Stability
Load Mismatch Tolerance DC & RF TEST CONDITIONS
Output Power 1 D -0.80 -0.40 +0.00 dB POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 d-IP -30 -30 Deg POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 VSWR-S 2:1 --POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 LMT 3:1 --POUT1, V1, IDQ1, PW1, DF1, F1, F2, F3, TF1, S1 SYM MIN NOM MAX UNITS TEST CONDITIONS POUT1 -50 -W -Drain Supply Voltage 1 V1 -50 -V -Quiescent Drain Current 1 IDQ1 -15 -mA -Pulse Width 1 PW1 -1 -ms -Duty Factor 1 DF1 -15 -% -Frequency 1 F1 -5.20 -GHz -Frequency 2 F2 -5.55 -GHz -Frequency 3 F3 -5.90 -GHz -Flange Temperature 1 TF1 25 30 35 В°C -Screening Level 1 S1 -100 -% -IGT5259L50 PRELIMINARY SPECIFICATION
FILE: IGT5259L50-REV-PR1-DS-REV-NC
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EL SEGUNDO, CA 90245-4620 Part Number: Integra IGT5259L50 TECHNOLOGIES, INC. PARAMETER SYM MIN MAX UNITS SCREEN CONDITIONS VDS -60 V BD Gate-Source Voltage VGS -10 0 V BD TF = 25В°C Storage Temperature Range TSTG -55 +150 В°C BD -TJ -55 +200 В°C BD -DC Wafer Probe --100% Per Integra Spec Wafer DC, RF Qualification --Q1 Per Integra Spec Wire Bond Strength --LM Per Integra Spec MAXIMUM RATINGS
Drain-Source Voltage Operating Junction Temperature TF = 25В°C PROCESS SPECIFICATIONS Pre-cap Visual Inspection --100% Per Integra Spec Gross Leak Test – MIL-STD-750D --100% Method 1071.6 C RTH(JC) -TBD В°C/W BD Parameter Qualified By Design BD ---Parameter Qualified …