DATASHEET
HM-65642/883 FN3004
Rev.2.00
May 2002 8K x 8 Asynchronous CMOS Static RAM Features Description This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1. Full CMOS Design Six Transistor Memory Cell Low Standby Supply Current . 100пЃA Low Operating Supply Current . 20mA Fast Address Access Time . .150ns Low Data Retention Supply Voltage 2.0V CMOS/TTL Compatible Inputs/Outputs JEDEC Approved Pinout Equal Cycle and Access Times No Clocks or Strobes Required Gated Inputs
-No Pull-Up or Pull-Down Resistors Required Temperature Range -55oC to +125oC Easy Microprocessor Interfacing Dual Chip Enable Control The HM-65642/883 is a CMOS 8192 x 8-bit Static Random
Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide
standard, which allows easy memory board layouts which
accommodate a variety of industry standard ROM, PROM,
EPROM, EEPROM and RAMs. The HM-65642/883 is ideally
suited for use in microprocessor based systems. In particular, interfacing with the Intersil 80C86 and 80C88 microprocessors is simplified by the convenient output enable (G)
input.
The HM-65642/883 is a full CMOS RAM which utilizes an
array of six transistor (6T) memory cells for the most stable
and lowest possible standby supply current over the full military temperature range. Ordering Information
PACKAGE TEMPERATURE RANGE 150ns/75пЃA 150ns/150пЃA CERDIP -55oC to +125oC HM1-65642B/883 HM1-65642/883 CLCC -55oC to +125oC HM4-65642B/883 HM4-65642/883 200ns/250пЃA
HM1-65642C/883
-PKG. NO.
F28.6
J32.A Pinouts 25 A8 E2 A6 4 W 26 E2 VCC A7 3 NC 27 W NC 28 VCC A12 2 A12 NC 1 HM4-65642/883 (CLCC)
TOP VIEW
A7 HM-65642/883 (CERDIP)
TOP VIEW 4 3 2 1 32 31 30 PIN A6 5 29 A8 A5 6 28 A9 A4 7 27 A11 A DESCRIPTION …
