Datasheet Intersil ISL1221IUZ-T — Datenblatt

HerstellerIntersil
SerieISL1221
ArtikelnummerISL1221IUZ-T

Low Power RTC mit batteriegepuffertem SRAM und Ereigniserkennung

Datenblätter

ISL1221 Datasheet
PDF, 1.0 Mb, Revision: 2017-11-02
Auszug aus dem Dokument

Preise

Verpackung

Package10 Ld MSOP T+R

Parameter

Alarms1
Battery BackupYes
Battery SealYes
CPU Supervisory Function PORNo
CPU Supervisory Function Watchdog TimerNo
Crystal Frequency TrimmingYes
DescriptionLow Power RTC with Battery Backed SRAM and Event Detection
FOUTFOUT
Freq. Out PinYes
IBAT400 nA
IRQ PinYes
IRQ_BarIRQ_bar/EVDET_bar
Memory TypeRAM
Operating Temperature Range-40 to 85
Oscillator Compensation (ppm)-94 to +140
Other FunctionsEvent Detect, Time Stamp
Peak Temp260°C
Qualification LevelStandard
RESET_barNo
ResetNo
SRAM2 Bytes
Selectable Frequency Output15
Tamper DetectYes
Time Keeping Current1.2 μA
TimerNo
VBAT (max)5.5 V
VBAT (min)1.8 V
VCC (max)5.5 V
VCC (min)2.7 V
interfaceI2C

Öko-Plan

RoHSCompliant

Modellreihe

Serie: ISL1221 (2)

Herstellerklassifikation

  • Timing & Digital ICs > Real Time Clocks > Real Time Clocks

Andere Namen:

ISL1221IUZT, ISL1221IUZ T