Datasheet Linear Technology LTC2261-14 — Datenblatt

HerstellerLinear Technology
SerieLTC2261-14

14-Bit-125-Vsp-Ultra-Low-Power-1,8-V-ADCs

Datenblätter

Datasheet LTC2261-14, LTC2260-14, LTC2259-14
PDF, 809 Kb, Sprache: en, Datei hochgeladen: Aug 20, 2017, Seiten: 34
14-Bit, 125Msps Ultra-Low Power 1.8V ADCs
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Preise

Verpackung

LTC2261CUJ-14#PBFLTC2261CUJ-14#TRPBFLTC2261IUJ-14#PBFLTC2261IUJ-14#TRPBF
N1234
Package6x6 QFN-40
Paketumrisszeichnung
6x6 QFN-40
Paketumrisszeichnung
6x6 QFN-40
Paketumrisszeichnung
6x6 QFN-40
Paketumrisszeichnung
Package CodeUJUJUJUJ
Package Index05-08-172805-08-172805-08-172805-08-1728
Pin Count40404040

Parameter

Parameters / ModelsLTC2261CUJ-14#PBFLTC2261CUJ-14#TRPBFLTC2261IUJ-14#PBFLTC2261IUJ-14#TRPBF
ADC INL, LSB1111
ADCs1111
ArchitecturePipelinePipelinePipelinePipeline
Bipolar/Unipolar InputUnipolar, BipolarUnipolar, BipolarUnipolar, BipolarUnipolar, Bipolar
Bits, bits14141414
Number of Channels1111
DNL, LSB0.30.30.30.3
Demo BoardsDC1369A-A,DC1370A-A,DC1760ADC1369A-A,DC1370A-A,DC1760ADC1369A-A,DC1370A-A,DC1760ADC1369A-A,DC1370A-A,DC1760A
Design ToolsLinearLabToolsLinearLabToolsLinearLabToolsLinearLabTools
Export Controlnononono
FeaturesData Output Randomizer, Clock Duty Cycle StabilizerData Output Randomizer, Clock Duty Cycle StabilizerData Output Randomizer, Clock Duty Cycle StabilizerData Output Randomizer, Clock Duty Cycle Stabilizer
I/OParallel CMOS, Parallel DDR CMOS, Parallel DDR LVDSParallel CMOS, Parallel DDR CMOS, Parallel DDR LVDSParallel CMOS, Parallel DDR CMOS, Parallel DDR LVDSParallel CMOS, Parallel DDR CMOS, Parallel DDR LVDS
Input DriveDifferential, Single-EndedDifferential, Single-EndedDifferential, Single-EndedDifferential, Single-Ended
Input Span1Vpp to 2Vpp1Vpp to 2Vpp1Vpp to 2Vpp1Vpp to 2Vpp
Internal Referenceyesyesyesyes
Latency5555
Operating Temperature Range, °C0 to 700 to 70-40 to 85-40 to 85
Power, mW127127127127
SFDR, dB88888888
SINAD, dB73737373
SNR, dB73.473.473.473.4
Simultaneousnononono
Speed, ksps125000125000125000125000
Supply Voltage Range1.8V1.8V1.8V1.8V

Öko-Plan

LTC2261CUJ-14#PBFLTC2261CUJ-14#TRPBFLTC2261IUJ-14#PBFLTC2261IUJ-14#TRPBF
RoHSCompliantCompliantCompliantCompliant

Andere Optionen

LTC2259-14 LTC2259-14 LTC2260-14 LTC2260-14

Konstruktionshinweise

  • A Low Power, Direct-to-Digital IF Receiver with Variable Gain &mdash DN482
    PDF, 87 Kb, Datei veröffentlicht: Aug 3, 2010
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Artikel

  • New Generation of 14-Bit 150Msps ADCs Dissipates a Third the Power of the Previous Generation without Sacrificing AC Performance &mdash LT Journal
    PDF, 545 Kb, Datei veröffentlicht: Dec 1, 2009
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Modellreihe

Herstellerklassifikation

  • Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)