Datasheet Texas Instruments TLV2762 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | TLV2762 |
Dual 1,8-V-, Micro-Power-, Rail-to-Rail-Einzelversorgungsverstärker
Datenblätter
Family of 1.8-V MicroPower Rail-to-Rail Input/Output Op Amps with Shutdown datasheet
PDF, 1.8 Mb, Revision: F, Datei veröffentlicht: Aug 20, 2013
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Preise
Status
| TLV2762CD | TLV2762CDGK | TLV2762CDGKR | TLV2762CDR | TLV2762ID | TLV2762IDG4 | TLV2762IDGK | TLV2762IDGKG4 | TLV2762IDGKR | TLV2762IDGKRG4 | TLV2762IDR | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No | No | Yes | No | No | Yes | No | No | No |
Verpackung
| TLV2762CD | TLV2762CDGK | TLV2762CDGKR | TLV2762CDR | TLV2762ID | TLV2762IDG4 | TLV2762IDGK | TLV2762IDGKG4 | TLV2762IDGKR | TLV2762IDGKRG4 | TLV2762IDR | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 |
| Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Package Type | D | DGK | DGK | D | D | D | DGK | DGK | DGK | DGK | D |
| Industry STD Term | SOIC | VSSOP | VSSOP | SOIC | SOIC | SOIC | VSSOP | VSSOP | VSSOP | VSSOP | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 75 | 80 | 2500 | 2500 | 75 | 75 | 80 | 80 | 2500 | 2500 | 2500 |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | 2762C | AJO | AJO | 2762C | 2762I | 2762I | AJP | AJP | AJP | AJP | 2762I |
| Width (mm) | 3.91 | 3 | 3 | 3.91 | 3.91 | 3.91 | 3 | 3 | 3 | 3 | 3.91 |
| Length (mm) | 4.9 | 3 | 3 | 4.9 | 4.9 | 4.9 | 3 | 3 | 3 | 3 | 4.9 |
| Thickness (mm) | 1.58 | .97 | .97 | 1.58 | 1.58 | 1.58 | .97 | .97 | .97 | .97 | 1.58 |
| Pitch (mm) | 1.27 | .65 | .65 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 | 1.27 |
| Max Height (mm) | 1.75 | 1.07 | 1.07 | 1.75 | 1.75 | 1.75 | 1.07 | 1.07 | 1.07 | 1.07 | 1.75 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | TLV2762CD | TLV2762CDGK | TLV2762CDGKR | TLV2762CDR | TLV2762ID | TLV2762IDG4 | TLV2762IDGK | TLV2762IDGKG4 | TLV2762IDGKR | TLV2762IDGKRG4 | TLV2762IDR |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Additional Features | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
| Architecture | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS |
| CMRR(Min), dB | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 | 55 |
| CMRR(Typ), dB | 76 | 76 | 76 | 76 | 76 | 76 | 76 | 76 | 76 | 76 | 76 |
| GBW(Typ), MHz | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 | 0.5 |
| Input Bias Current(Max), pA | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 | 15 |
| Iq per channel(Max), mA | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 | 0.028 |
| Iq per channel(Typ), mA | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 |
| Number of Channels | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Offset Drift(Typ), uV/C | 9 | 9 | 9 | 9 | 9 | 9 | 9 | 9 | 9 | 9 | 9 |
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 |
| Output Current(Typ), mA | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 | 7 |
| Package Group | SOIC | VSSOP | VSSOP | SOIC | SOIC | SOIC | VSSOP | VSSOP | VSSOP | VSSOP | SOIC |
| Package Size: mm2:W x L, PKG | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
| Rail-to-Rail | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out | In,Out |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Slew Rate(Typ), V/us | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 | 0.22 |
| Total Supply Voltage(Max), +5V=5, +/-5V=10 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 |
| Total Supply Voltage(Min), +5V=5, +/-5V=10 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 | 1.8 |
| Vn at 1kHz(Typ), nV/rtHz | 95 | 95 | 95 | 95 | 95 | 95 | 95 | 95 | 95 | 95 | 95 |
| Vos (Offset Voltage @ 25C)(Max), mV | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 | 3.5 |
Öko-Plan
| TLV2762CD | TLV2762CDGK | TLV2762CDGKR | TLV2762CDR | TLV2762ID | TLV2762IDG4 | TLV2762IDGK | TLV2762IDGKG4 | TLV2762IDGKR | TLV2762IDGKRG4 | TLV2762IDR | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- TLV276x EMI Immunity PerformancePDF, 90 Kb, Datei veröffentlicht: Nov 15, 2012
Modellreihe
Serie: TLV2762 (11)
Herstellerklassifikation
- Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> Ultra-Low-Power Op Amps (<=250uA)