Datasheet Texas Instruments TLV2553 — Datenblatt

HerstellerTexas Instruments
SerieTLV2553
Datasheet Texas Instruments TLV2553

12-Bit, 200 KSPS, 11-Kanal, geringer Stromverbrauch, serieller ADC-serieller Ausgang, mit Pwrdwn

Datenblätter

TLV2553 12-Bit, 200-KSPS, 11-Channel, Low-Power, Serial ADC datasheet
PDF, 1.2 Mb, Revision: C, Datei veröffentlicht: Jul 9, 2015
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Preise

Status

TLV2553IDWTLV2553IDWG4TLV2553IDWRTLV2553IDWRG4TLV2553IPWTLV2553IPWG4TLV2553IPWRTLV2553IPWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesYesNoNoYesNo

Verpackung

TLV2553IDWTLV2553IDWG4TLV2553IDWRTLV2553IDWRG4TLV2553IPWTLV2553IPWG4TLV2553IPWRTLV2553IPWRG4
N12345678
Pin2020202020202020
Package TypeDWDWDWDWPWPWPWPW
Industry STD TermSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252520002000707020002000
CarrierTUBETUBELARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingTLV2553ITLV2553ITLV2553ITLV2553ITY2553TY2553TY2553TY2553
Width (mm)7.57.57.57.54.44.44.44.4
Length (mm)12.812.812.812.86.56.56.56.5
Thickness (mm)2.352.352.352.351111
Pitch (mm)1.271.271.271.27.65.65.65.65
Max Height (mm)2.652.652.652.651.21.21.21.2
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsTLV2553IDW
TLV2553IDW
TLV2553IDWG4
TLV2553IDWG4
TLV2553IDWR
TLV2553IDWR
TLV2553IDWRG4
TLV2553IDWRG4
TLV2553IPW
TLV2553IPW
TLV2553IPWG4
TLV2553IPWG4
TLV2553IPWR
TLV2553IPWR
TLV2553IPWRG4
TLV2553IPWRG4
# Input Channels1111111111111111
Analog Voltage AVDD(Max), V5.55.55.55.55.55.55.55.5
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.55.55.5
Digital Supply(Min), V2.72.72.72.72.72.72.72.7
INL(Max), +/-LSB11111111
Input Range(Max), V5.55.55.55.55.55.55.55.5
Input TypeSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesOscillatorOscillatorOscillatorOscillatorOscillatorOscillatorOscillatorOscillator
InterfaceSPISPISPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
Power Consumption(Typ), mW2.432.432.432.432.432.432.432.43
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExtExt
Resolution, Bits1212121212121212
SINAD, dB69.569.569.569.569.569.569.569.5
SNR, dB69.569.569.569.569.569.569.569.5
Sample Rate (max), SPS200kSPS200kSPS200kSPS200kSPS200kSPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.20.20.20.20.20.2

Öko-Plan

TLV2553IDWTLV2553IDWG4TLV2553IDWRTLV2553IDWRG4TLV2553IPWTLV2553IPWG4TLV2553IPWRTLV2553IPWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Herstellerklassifikation

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)