Datasheet Texas Instruments TLV2548-EP — Datenblatt

HerstellerTexas Instruments
SerieTLV2548-EP
Datasheet Texas Instruments TLV2548-EP

Erweitertes Produkt 2-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S / W und H / W), Low Power W / 8 x FIFO W / 8 Ch

Datenblätter

2.7-V to 5.5-V 12-Bit 200 KSPS 4-/8-Channel Low-Power Serial Converter datasheet
PDF, 1.3 Mb, Datei veröffentlicht: Oct 28, 2009
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Preise

Status

TLV2548MPWREPV62/10603-01XE
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

Verpackung

TLV2548MPWREPV62/10603-01XE
N12
Pin2020
Package TypePWPW
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY20002000
CarrierLARGE T&RLARGE T&R
Device MarkingTV2548EPTV2548EP
Width (mm)4.44.4
Length (mm)6.56.5
Thickness (mm)11
Pitch (mm).65.65
Max Height (mm)1.21.2
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsTLV2548MPWREP
TLV2548MPWREP
V62/10603-01XE
V62/10603-01XE
# Input Channels88
Analog Voltage AVDD(Max), V5.55.5
Analog Voltage AVDD(Min), V33
ArchitectureSARSAR
Digital Supply(Max), V5.55.5
Digital Supply(Min), V33
ENOB, Bits11.611.6
INL(Max), +/-LSB1.21.2
InterfaceSPISPI
Operating Temperature Range, C-55 to 125-55 to 125
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
Power Consumption(Typ), mW3.33.3
RatingHiRel Enhanced ProductHiRel Enhanced Product
Reference ModeExt,IntExt,Int
Resolution, Bits1212
SFDR, dB8484
SNR, dB7070
Sample Rate (max), SPS200kSPS200kSPS

Öko-Plan

TLV2548MPWREPV62/10603-01XE
RoHSCompliantCompliant

Anwendungshinweise

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Modellreihe

Serie: TLV2548-EP (2)

Herstellerklassifikation

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters