Datasheet Texas Instruments TLV2548 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | TLV2548 |
12-Bit 200 kSPS ADC Ser. Out, Auto Pwrdn (S / W und H / W), Low Power W / 8 x FIFO W / 8 Ch.
Datenblätter
2.7-V to 5.5-V 12-Bit 200 KSPS 4-/8-Channel Low-Power Serial Converters datasheet
PDF, 1.7 Mb, Revision: E, Datei veröffentlicht: Jun 3, 2003
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Preise
Status
| TLV2548CDW | TLV2548CDWG4 | TLV2548CDWR | TLV2548CDWRG4 | TLV2548CPW | TLV2548CPWG4 | TLV2548CPWR | TLV2548CPWRG4 | TLV2548IDW | TLV2548IDWG4 | TLV2548IDWR | TLV2548IPW | TLV2548IPWG4 | TLV2548IPWR | TLV2548IPWRG4 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | No | No | No | No | No | No | No | Yes | Yes | No | No | No | Yes |
Verpackung
| TLV2548CDW | TLV2548CDWG4 | TLV2548CDWR | TLV2548CDWRG4 | TLV2548CPW | TLV2548CPWG4 | TLV2548CPWR | TLV2548CPWRG4 | TLV2548IDW | TLV2548IDWG4 | TLV2548IDWR | TLV2548IPW | TLV2548IPWG4 | TLV2548IPWR | TLV2548IPWRG4 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DW | DW | DW | DW | PW | PW | PW | PW | DW | DW | DW | PW | PW | PW | PW |
| Industry STD Term | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 2000 | 2000 | 70 | 70 | 2000 | 2000 | 25 | 25 | 2000 | 70 | 70 | 2000 | 2000 |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | 2548C | 2548C | 2548C | 2548C | TV2548 | TV2548 | TV2548 | TV2548 | 2548I | 2548I | 2548I | TY2548 | TY2548 | TY2548 | TY2548 |
| Width (mm) | 7.5 | 7.5 | 7.5 | 7.5 | 4.4 | 4.4 | 4.4 | 4.4 | 7.5 | 7.5 | 7.5 | 4.4 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 12.8 | 12.8 | 12.8 | 12.8 | 6.5 | 6.5 | 6.5 | 6.5 | 12.8 | 12.8 | 12.8 | 6.5 | 6.5 | 6.5 | 6.5 |
| Thickness (mm) | 2.35 | 2.35 | 2.35 | 2.35 | 1 | 1 | 1 | 1 | 2.35 | 2.35 | 2.35 | 1 | 1 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
| Max Height (mm) | 2.65 | 2.65 | 2.65 | 2.65 | 1.2 | 1.2 | 1.2 | 1.2 | 2.65 | 2.65 | 2.65 | 1.2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | TLV2548CDW | TLV2548CDWG4 | TLV2548CDWR | TLV2548CDWRG4 | TLV2548CPW | TLV2548CPWG4 | TLV2548CPWR | TLV2548CPWRG4 | TLV2548IDW | TLV2548IDWG4 | TLV2548IDWR | TLV2548IPW | TLV2548IPWG4 | TLV2548IPWR | TLV2548IPWRG4 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| # Input Channels | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
| INL(Max), +/-LSB | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Input Range(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Input Type | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended |
| Integrated Features | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator |
| Interface | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI |
| Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 |
| Package Group | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) |
| Power Consumption(Typ), mW | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| SINAD, dB | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 |
| SNR, dB | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 | 70 |
| Sample Rate (max), SPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS |
| Sample Rate(Max), MSPS | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 |
| THD(Typ), dB | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 | -82 |
Öko-Plan
| TLV2548CDW | TLV2548CDWG4 | TLV2548CDWR | TLV2548CDWRG4 | TLV2548CPW | TLV2548CPWG4 | TLV2548CPWR | TLV2548CPWRG4 | TLV2548IDW | TLV2548IDWG4 | TLV2548IDWR | TLV2548IPW | TLV2548IPWG4 | TLV2548IPWR | TLV2548IPWRG4 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- Using the TMS320C5402 DMA Channels to Read From the TLV2548PDF, 142 Kb, Datei veröffentlicht: May 16, 2000
This application report presents a hardware and software solution for using the DMA channels of the 16-bit, fixed-point TMS320C5402 DSP to collect digital samples form the TLV2548 12-bit, 200-KSPS, 4/8-channel, low-power serial analog-to-digital converter. - Interfacing the TLV2544/TLV2548 ADC to the TMS320C5402 DSP (Rev. A)PDF, 154 Kb, Revision: A, Datei veröffentlicht: Oct 26, 2000
This application report presents a hardware and software solution for interfacing the TLV2544/TLV2548 12-bit, 200-ksps, 4-/8-channel, low-power, serial analog-to-digital converters to the 16-bit, fixed-point TMS320C5402 DSK. - Interfacing the TLV2544/TLV2548 ADC to the TMS320C31 DSPPDF, 579 Kb, Datei veröffentlicht: Oct 6, 2000
This application report presents a hardware and software solution for interfacing the TLV2544/TLV2548 12-bit, 200Ksps, 4/8-channel, low-power, serial, successive approximation register (SAR) analog-to-digital converters (ADC) to the 32-bit floating point TMS320CX digital signal processor (DSP) through the use of the TMS320C31 DSP starter kit (DSK).A digital-to-analog converter (DAC) interface - Evaluating the TLV2462 and TLV2772 as Drive Amps for the TLV2544/TLV2548 ADCPDF, 63 Kb, Datei veröffentlicht: Jun 26, 2000
This report presents a method for comparing the ac performance of the TLV2462 and TLV2772 operational amplifiers to the ac performance of the TLV2544/TLV2548 analog-to-digital converter. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: TLV2548 (15)
Herstellerklassifikation
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)