Datasheet Texas Instruments TLV2542 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | TLV2542 |
12-Bit-ADC mit 200 kSPS, serieller Ausgang, TMS320-kompatibel (bis zu 10 MHz), Dual Ch. Auto Sweep
Datenblätter
2.7 V to 5.5 V Low-Power 12-Bit 140/200 KSPS, Serial Analog-To-Digital Converter datasheet
PDF, 1.2 Mb, Revision: E, Datei veröffentlicht: Apr 12, 2010
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Preise
Status
| TLV2542CDGK | TLV2542CDGKG4 | TLV2542CDGKR | TLV2542ID | TLV2542IDG4 | TLV2542IDGK | TLV2542IDGKG4 | TLV2542IDGKR | TLV2542IDR | |
|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | No | No | Yes | No | Yes | No | Yes |
Verpackung
| TLV2542CDGK | TLV2542CDGKG4 | TLV2542CDGKR | TLV2542ID | TLV2542IDG4 | TLV2542IDGK | TLV2542IDGKG4 | TLV2542IDGKR | TLV2542IDR | |
|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Package Type | DGK | DGK | DGK | D | D | DGK | DGK | DGK | D |
| Industry STD Term | VSSOP | VSSOP | VSSOP | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 80 | 80 | 2500 | 75 | 75 | 80 | 80 | 2500 | 2500 |
| Carrier | TUBE | TUBE | LARGE T&R | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | AHB | AHB | AHB | 2542I | 2542I | AHC | AHC | AHC | 2542I |
| Width (mm) | 3 | 3 | 3 | 3.91 | 3.91 | 3 | 3 | 3 | 3.91 |
| Length (mm) | 3 | 3 | 3 | 4.9 | 4.9 | 3 | 3 | 3 | 4.9 |
| Thickness (mm) | .97 | .97 | .97 | 1.58 | 1.58 | .97 | .97 | .97 | 1.58 |
| Pitch (mm) | .65 | .65 | .65 | 1.27 | 1.27 | .65 | .65 | .65 | 1.27 |
| Max Height (mm) | 1.07 | 1.07 | 1.07 | 1.75 | 1.75 | 1.07 | 1.07 | 1.07 | 1.75 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | TLV2542CDGK | TLV2542CDGKG4 | TLV2542CDGKR | TLV2542ID | TLV2542IDG4 | TLV2542IDGK | TLV2542IDGKG4 | TLV2542IDGKR | TLV2542IDR |
|---|---|---|---|---|---|---|---|---|---|
| # Input Channels | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
| INL(Max), +/-LSB | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Input Range(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Input Type | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended |
| Integrated Features | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator |
| Interface | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI | SPI |
| Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 |
| Package Group | VSSOP | VSSOP | VSSOP | SOIC | SOIC | VSSOP | VSSOP | VSSOP | SOIC |
| Package Size: mm2:W x L, PKG | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8VSSOP: 15 mm2: 4.9 x 3(VSSOP) | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
| Power Consumption(Typ), mW | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 | 2.8 |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext | Ext |
| Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| SINAD, dB | 72 | 72 | 72 | 72 | 72 | 72 | 72 | 72 | 72 |
| SNR, dB | 72 | 72 | 72 | 72 | 72 | 72 | 72 | 72 | 72 |
| Sample Rate (max), SPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS |
| Sample Rate(Max), MSPS | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 |
| THD(Typ), dB | -84 | -84 | -84 | -84 | -84 | -84 | -84 | -84 | -84 |
Öko-Plan
| TLV2542CDGK | TLV2542CDGKG4 | TLV2542CDGKR | TLV2542ID | TLV2542IDG4 | TLV2542IDGK | TLV2542IDGKG4 | TLV2542IDGKR | TLV2542IDR | |
|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- Interfacing the TLC2552 and TLV2542 to the MSP430F149PDF, 123 Kb, Datei veröffentlicht: Feb 10, 2003
This application note discusses the features of the TLC2552 and TLV2542 ADC. An SPI interface code example for the MSP430F149 to the TLC2552 ADC, and for the MSP430F149 to the TLV2542 ADC, are also presented. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, Datei veröffentlicht: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: TLV2542 (9)
Herstellerklassifikation
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)