Datasheet Texas Instruments TLC2543-EP — Datenblatt
| Hersteller | Texas Instruments |
| Serie | TLC2543-EP |
Verbesserter 12-Bit-Analog-Digital-Wandler mit serieller Steuerung und 11 Analogeingängen
Datenblätter
TLC2543-EP datasheet
PDF, 1.1 Mb, Revision: A, Datei veröffentlicht: Nov 2, 2006
Auszug aus dem Dokument
Preise
Status
| TLC2543MDBREP | TLC2543QDWREP | V62/03614-01XE | V62/03614-02YE | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No |
Verpackung
| TLC2543MDBREP | TLC2543QDWREP | V62/03614-01XE | V62/03614-02YE | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 20 | 20 | 20 | 20 |
| Package Type | DB | DW | DW | DB |
| Industry STD Term | SSOP | SOIC | SOIC | SSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 2000 | 2000 | 2000 | 2000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | TLC2543EP | TLC2543QEP | TLC2543QEP | TLC2543EP |
| Width (mm) | 5.3 | 7.5 | 7.5 | 5.3 |
| Length (mm) | 7.2 | 12.8 | 12.8 | 7.2 |
| Thickness (mm) | 1.95 | 2.35 | 2.35 | 1.95 |
| Pitch (mm) | .65 | 1.27 | 1.27 | .65 |
| Max Height (mm) | 2 | 2.65 | 2.65 | 2 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | TLC2543MDBREP | TLC2543QDWREP | V62/03614-01XE | V62/03614-02YE |
|---|---|---|---|---|
| # Input Channels | 11 | 11 | 11 | 11 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 4.5 | 4.5 | 4.5 | 4.5 |
| Architecture | SAR | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 4.5 | 4.5 | 4.5 | 4.5 |
| INL(Max), +/-LSB | 1 | 1 | 1 | 1 |
| Interface | SPI | SPI | SPI | SPI |
| Operating Temperature Range, C | -40 to 125,-55 to 125 | -40 to 125,-55 to 125 | -40 to 125,-55 to 125 | -40 to 125,-55 to 125 |
| Package Group | SSOP | SOIC | SOIC | SSOP |
| Package Size: mm2:W x L, PKG | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) |
| Power Consumption(Typ), mW | 5 | 5 | 5 | 5 |
| Rating | HiRel Enhanced Product | HiRel Enhanced Product | HiRel Enhanced Product | HiRel Enhanced Product |
| Reference Mode | Ext | Ext | Ext | Ext |
| Resolution, Bits | 12 | 12 | 12 | 12 |
| Sample Rate (max), SPS | 66kSPS | 66kSPS | 66kSPS | 66kSPS |
Öko-Plan
| TLC2543MDBREP | TLC2543QDWREP | V62/03614-01XE | V62/03614-02YE | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Datei veröffentlicht: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Modellreihe
Serie: TLC2543-EP (4)
Herstellerklassifikation
- Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters