Datasheet Texas Instruments TL16C552A — Datenblatt

HerstellerTexas Instruments
SerieTL16C552A
Datasheet Texas Instruments TL16C552A

Dual UART mit 16-Byte-FIFOs und parallelem Port

Datenblätter

Dual Asychronous Communications Element With FIFO datasheet
PDF, 488 Kb, Revision: D, Datei veröffentlicht: Jan 21, 1999
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Preise

Status

TL16C552AFNTL16C552AFNG4TL16C552AFNRTL16C552AFNRG4TL16C552AIFNTL16C552AIFNG4TL16C552APN
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesNoYesNoNo

Verpackung

TL16C552AFNTL16C552AFNG4TL16C552AFNRTL16C552AFNRG4TL16C552AIFNTL16C552AIFNG4TL16C552APN
N1234567
Pin68686868686880
Package TypeFNFNFNFNFNFNPN
Industry STD TermPLCCPLCCPLCCPLCCPLCCPLCCLQFP
JEDEC CodeS-PQCC-JS-PQCC-JS-PQCC-JS-PQCC-JS-PQCC-JS-PQCC-JS-PQFP-G
Package QTY18182502501818119
CarrierTUBETUBESMALL T&RSMALL T&RTUBETUBEJEDEC TRAY (10+1)
Device MarkingTL16C552AFNTL16C552AFNTL16C552AFNTL16C552AFNTL16C552AIFNTL16C552AIFNTL16C552APN
Width (mm)24.2324.2324.2324.2324.2324.2312
Length (mm)24.2324.2324.2324.2324.2324.2312
Thickness (mm)4.064.064.064.064.064.061.4
Pitch (mm)1.271.271.271.271.271.27.5
Max Height (mm)4.574.574.574.574.574.571.6
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsTL16C552AFN
TL16C552AFN
TL16C552AFNG4
TL16C552AFNG4
TL16C552AFNR
TL16C552AFNR
TL16C552AFNRG4
TL16C552AFNRG4
TL16C552AIFN
TL16C552AIFN
TL16C552AIFNG4
TL16C552AIFNG4
TL16C552APN
TL16C552APN
Auto RTS/CTSYesYesYesYesYesYesYes
Baud Rate (max) at Vcc = 1.8V and with 16X Sampling, MbpsN/AN/AN/AN/AN/AN/AN/A
Baud Rate (max) at Vcc = 2.5V and with 16X Sampling, MbpsN/AN/AN/AN/AN/AN/AN/A
Baud Rate (max) at Vcc = 3.3V and with 16X Sampling, MbpsN/AN/AN/AN/AN/AN/AN/A
Baud Rate (max) at Vcc = 5.0V and with 16X Sampling, Mbps1111111
CPU InterfaceX86X86X86X86X86X86X86
FIFOs, bytes16161616161616
Number of Channels2222222
Operating Temperature Range, C-40 to 85,-55 to 125-40 to 85,-55 to 125-40 to 85,-55 to 125-40 to 85,-55 to 125-40 to 85,-55 to 125-40 to 85,-55 to 125-40 to 85,-55 to 125
Operating Voltage, V5555555
Package GroupPLCCPLCCPLCCPLCCPLCCPLCCLQFP
Programmable FIFO Trigger LevelsNoNoNoNoNoNoNo
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Rx FIFO Trigger Levels4444444
Tx FIFO Trigger LevelsN/AN/AN/AN/AN/AN/AN/A

Öko-Plan

TL16C552AFNTL16C552AFNG4TL16C552AFNRTL16C552AFNRG4TL16C552AIFNTL16C552AIFNG4TL16C552APN
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Modellreihe

Herstellerklassifikation

  • Semiconductors> Interface> UART