Datasheet Texas Instruments THS4121 — Datenblatt

Hersteller	Texas Instruments
Serie	THS4121

3,3 V, 100 MHz, 43 V / us, volldifferenzieller CMOS-Verstärker

Datenblätter

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PDF, 1.1 Mb, Revision: D, Datei veröffentlicht: Oct 13, 2004

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Preise

Status

	THS4121CD	THS4121CDGK	THS4121CDGKR	THS4121CDGN	THS4121ID	THS4121IDG4	THS4121IDGK	THS4121IDGKR	THS4121IDGKRG4	THS4121IDGN	THS4121IDGNG4	THS4121IDGNR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	Yes	No	No	Yes	No	Yes	No	No	No	Yes	Yes

Verpackung

	THS4121CD	THS4121CDGK	THS4121CDGKR	THS4121CDGN	THS4121ID	THS4121IDG4	THS4121IDGK	THS4121IDGKR	THS4121IDGKRG4	THS4121IDGN	THS4121IDGNG4	THS4121IDGNR
N	1	2	3	4	5	6	7	8	9	10	11	12
Pin	8	8	8	8	8	8	8	8	8	8	8	8
Package Type	D	DGK	DGK	DGN	D	D	DGK	DGK	DGK	DGN	DGN	DGN
Industry STD Term	SOIC	VSSOP	VSSOP	HVSSOP	SOIC	SOIC	VSSOP	VSSOP	VSSOP	HVSSOP	HVSSOP	HVSSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	S-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	S-PDSO-G	S-PDSO-G	S-PDSO-G
Package QTY	75	80	2500	80	75	75	80	2500	2500	80	80	2500
Carrier	TUBE	TUBE	LARGE T&R	TUBE	TUBE	TUBE	TUBE	LARGE T&R	LARGE T&R	TUBE	TUBE	LARGE T&R
Device Marking	4121C	ATO	ATO	ASB	4121I	4121I	ASN	ASN	ASN	ASC	ASC	ASC
Width (mm)	3.91	3	3	3	3.91	3.91	3	3	3	3	3	3
Length (mm)	4.9	3	3	3	4.9	4.9	3	3	3	3	3	3
Thickness (mm)	1.58	.97	.97	1.02	1.58	1.58	.97	.97	.97	1.02	1.02	1.02
Pitch (mm)	1.27	.65	.65	.65	1.27	1.27	.65	.65	.65	.65	.65	.65
Max Height (mm)	1.75	1.07	1.07	1.1	1.75	1.75	1.07	1.07	1.07	1.1	1.1	1.1
Mechanical Data	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen	Herunterladen

Parameter

Parameters / Models	THS4121CD	THS4121CDGK	THS4121CDGKR	THS4121CDGN	THS4121ID	THS4121IDG4	THS4121IDGK	THS4121IDGKR	THS4121IDGKRG4	THS4121IDGN	THS4121IDGNG4	THS4121IDGNR
2nd Harmonic, dBc	79	79	79	79	79	79	79	79	79	79	79	79
3rd Harmonic, dBc	93	93	93	93	93	93	93	93	93	93	93	93
@ MHz	1	1	1	1	1	1	1	1	1	1	1	1
Acl, min spec gain, V/V	1	1	1	1	1	1	1	1	1	1	1	1
Additional Features	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A
Architecture	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB	CMOS,Fully Differential,Voltage FB
BW @ Acl, MHz	100	100	100	100	100	100	100	100	100	100	100	100
CMRR(Min), dB	64	64	64	64	64	64	64	64	64	64	64	64
CMRR(Typ), dB	96	96	96	96	96	96	96	96	96	96	96	96
GBW(Typ), MHz	100	100	100	100	100	100	100	100	100	100	100	100
Input Bias Current(Max), pA	1.2	1.2	1.2	1.2	1.2	1.2	1.2	1.2	1.2	1.2	1.2	1.2
Iq per channel(Max), mA	13.5	13.5	13.5	13.5	13.5	13.5	13.5	13.5	13.5	13.5	13.5	13.5
Iq per channel(Typ), mA	11	11	11	11	11	11	11	11	11	11	11	11
Number of Channels	1	1	1	1	1	1	1	1	1	1	1	1
Offset Drift(Typ), uV/C	25	25	25	25	25	25	25	25	25	25	25	25
Operating Temperature Range, C	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70
Output Current(Typ), mA	25	25	25	25	25	25	25	25	25	25	25	25
Package Group	SOIC	VSSOP	VSSOP	MSOP-PowerPAD	SOIC	SOIC	VSSOP	VSSOP	VSSOP	MSOP-PowerPAD	MSOP-PowerPAD	MSOP-PowerPAD
Package Size: mm2:W x L, PKG	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8VSSOP: 15 mm2: 4.9 x 3(VSSOP)	8VSSOP: 15 mm2: 4.9 x 3(VSSOP)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8VSSOP: 15 mm2: 4.9 x 3(VSSOP)	8VSSOP: 15 mm2: 4.9 x 3(VSSOP)	8VSSOP: 15 mm2: 4.9 x 3(VSSOP)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)
Rail-to-Rail	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out	In to V+,Out
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Slew Rate(Typ), V/us	55	55	55	55	55	55	55	55	55	55	55	55
Total Supply Voltage(Max), +5V=5, +/-5V=10	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5
Total Supply Voltage(Min), +5V=5, +/-5V=10	3	3	3	3	3	3	3	3	3	3	3	3
Vn at 1kHz(Typ), nV/rtHz	16	16	16	16	16	16	16	16	16	16	16	16
Vn at Flatband(Typ), nV/rtHz	5.4	5.4	5.4	5.4	5.4	5.4	5.4	5.4	5.4	5.4	5.4	5.4
Vos (Offset Voltage @ 25C)(Max), mV	8	8	8	8	8	8	8	8	8	8	8	8

Öko-Plan

	THS4121CD	THS4121CDGK	THS4121CDGKR	THS4121CDGN	THS4121ID	THS4121IDG4	THS4121IDGK	THS4121IDGKR	THS4121IDGKRG4	THS4121IDGN	THS4121IDGNG4	THS4121IDGNR
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

Anwendungshinweise

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Fully-Differential Amplifiers (Rev. E)
PDF, 867 Kb, Revision: E, Datei veröffentlicht: Sep 19, 2016
Differential signaling has been commonly used in audio, data transmission, and telephone systems for many years because of its inherent resistance to external noise sources. Today, differential signaling is becoming popular in high-speed data acquisition, where the ADCвЂ™s inputs are differential and a differential amplifier is needed to properly drive them.Two other advantages of di
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High-Voltage Signal Conditioning for Differential ADCs
PDF, 125 Kb, Datei veröffentlicht: Jun 14, 2004
Analog designers are frequently required to convert high-voltage signals to levels acceptable to low-voltage data converters with differential inputs. This paper describes solutions for this common task using modern amplifiers and typical power supplies. Three examples of conditioning В±10V bipolar signals for low-voltage analog-to-digital converters (ADCs) are shown: a single-supply design,
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Noise Analysis for High Speed Op Amps (Rev. A)
PDF, 256 Kb, Revision: A, Datei veröffentlicht: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Modellreihe

Serie: THS4121 (12)

THS4121CD THS4121CDGK THS4121CDGKR THS4121CDGN THS4121ID THS4121IDG4 THS4121IDGK THS4121IDGKR THS4121IDGKRG4 THS4121IDGN THS4121IDGNG4 THS4121IDGNR

Herstellerklassifikation

Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)