Datasheet Texas Instruments SN75LVDS83 — Datenblatt

HerstellerTexas Instruments
SerieSN75LVDS83
Datasheet Texas Instruments SN75LVDS83

FlatLink (TM) Sender

Datenblätter

FlatLink (tm) Transmitters datasheet
PDF, 884 Kb, Revision: I, Datei veröffentlicht: May 19, 2009
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Preise

Status

SN75LVDS83DGGSN75LVDS83DGGG4SN75LVDS83DGGRSN75LVDS83DGGR-PSN75LVDS83DGGRG4SN75LVDS83ZQLSN75LVDS83ZQLR
Lifecycle StatusNRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)NRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNo

Verpackung

SN75LVDS83DGGSN75LVDS83DGGG4SN75LVDS83DGGRSN75LVDS83DGGR-PSN75LVDS83DGGRG4SN75LVDS83ZQLSN75LVDS83ZQLR
N1234567
Pin56565656565652
Package TypeDGGDGGDGGDGGDGGZQLZQL
Industry STD TermTSSOPTSSOPTSSOPTSSOPTSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PBGA-N
Package QTY353520002000
CarrierTUBETUBELARGE T&RLARGE T&R
Device MarkingSN75LVDS83SN75LVDS83SN75LVDS83SN75LVDS83
Width (mm)6.16.16.16.16.14.54.5
Length (mm)141414141477
Thickness (mm)1.151.151.151.151.15.75.75
Pitch (mm).5.5.5.5.5.65.65
Max Height (mm)1.21.21.21.21.211
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Öko-Plan

SN75LVDS83DGGSN75LVDS83DGGG4SN75LVDS83DGGRSN75LVDS83DGGR-PSN75LVDS83DGGRG4SN75LVDS83ZQLSN75LVDS83ZQLR
RoHSCompliantCompliantCompliantNot CompliantCompliantNot CompliantNot Compliant
Pb FreeNoNoNo

Anwendungshinweise

  • Time Budgeting of the Flatlink Interface Application Report
    PDF, 99 Kb, Datei veröffentlicht: Jun 11, 1997
    This document describes the FlatLinkE point-to-point data-transmission interface that provides better than a two-to-one reduction in the number of signal lines used for synchronous parallel data-bus structures.
  • Flatlink Data Transmission System Design Overview (Rev. A)
    PDF, 127 Kb, Revision: A, Datei veröffentlicht: Jun 1, 2001
    FlatLink is a data transmission system that can provide better than a 2:1 reduction in the number of signal lines used for synchronous parallel data bus structures with no loss in data throughput. To do this, FlatLink takes single-ended data at clock rates of up to 68 MHz and increases the data signaling rate seven times up to 476 Mbps. The following report provides some design guidelinesfo

Modellreihe

Herstellerklassifikation

  • Semiconductors> Interface> Display & Imaging SerDes> FlatLink/FPD-Link (LVDS for LCD)