Datasheet Texas Instruments SN74LVTH18512 — Datenblatt

HerstellerTexas Instruments
SerieSN74LVTH18512
Datasheet Texas Instruments SN74LVTH18512

3,3-V-ABT-Scan-Testgeräte mit 18-Bit-Universalbus-Transceivern

Datenblätter

3.3-V ABT Scan Test Devices With 18-Bit Universal Bus Transceivers datasheet
PDF, 735 Kb, Revision: B, Datei veröffentlicht: Oct 1, 1997
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Preise

Status

74LVTH18512DGGRE4SN74LVTH18512DGGR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Verpackung

74LVTH18512DGGRE4SN74LVTH18512DGGR
N12
Pin6464
Package TypeDGGDGG
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY20002000
CarrierLARGE T&RLARGE T&R
Device MarkingLVTH18512LVTH18512
Width (mm)6.16.1
Length (mm)1717
Thickness (mm)1.151.15
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / Models74LVTH18512DGGRE4
74LVTH18512DGGRE4
SN74LVTH18512DGGR
SN74LVTH18512DGGR
Bits1818
F @ Nom Voltage(Max), Mhz160160
ICC @ Nom Voltage(Max), mA2424
Operating Temperature Range, C-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA64/-3264/-32
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG64TSSOP: 138 mm2: 8.1 x 17(TSSOP)64TSSOP: 138 mm2: 8.1 x 17(TSSOP)
RatingCatalogCatalog
Technology FamilyLVTLVT
VCC(Max), V3.63.6
VCC(Min), V2.72.7
Voltage(Nom), V3.33.3
tpd @ Nom Voltage(Max), ns4.94.9

Öko-Plan

74LVTH18512DGGRE4SN74LVTH18512DGGR
RoHSCompliantCompliant

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Modellreihe

Serie: SN74LVTH18512 (2)

Herstellerklassifikation

  • Semiconductors> Logic> Specialty Logic> Boundary Scan (JTAG) Logic