Datasheet Texas Instruments 8V182512IDGGREP — Datenblatt

Hersteller	Texas Instruments
Serie	SN74LVTH182512-EP
Artikelnummer	8V182512IDGGREP

Erweitertes Produkt 3.3-V Abt Scan-Testgeräte mit 18-Bit-Universalbus-Transceivern 64-TSSOP -40 bis 85

Datenblätter

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PDF, 678 Kb, Datei veröffentlicht: Nov 10, 2003

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Preise

Status

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Verpackung

Pin	64
Package Type	DGG
Industry STD Term	TSSOP
JEDEC Code	R-PDSO-G
Package QTY	2000
Carrier	LARGE T&R
Device Marking	LH182512EP
Width (mm)	6.1
Length (mm)	17
Thickness (mm)	1.15
Pitch (mm)	.5
Max Height (mm)	1.2
Mechanical Data	Herunterladen

Parameter

Bits	18
ICC @ Nom Voltage(Max)	24 mA
Input Type	TTL
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	64/-32 mA
Output Type	TTL
Package Group	TSSOP
Package Size: mm2:W x L	64TSSOP: 138 mm2: 8.1 x 17(TSSOP) PKG
Rating	HiRel Enhanced Product
Technology Family	LVT
VCC(Max)	3.6 V
VCC(Min)	2.7 V
tpd @ Nom Voltage(Max)	5.7 ns

Öko-Plan

RoHS

Compliant

Anwendungshinweise

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Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
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Modellreihe

Serie: SN74LVTH182512-EP (2)

8V182512IDGGREP V62/04730-01XE

Herstellerklassifikation

Semiconductors > Space & High Reliability > Logic Products > Specialty Logic Products > Boundary Scan (JTAG)