Datasheet Texas Instruments CLVTH16373MGQLREP — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74LVTH16373-EP |
| Artikelnummer | CLVTH16373MGQLREP |
Verbessertes Produkt 3.3-V Abt 16-Bit Transparente D-Typ-Latches mit 3-Zustands-Ausgängen 56-BGA MICROSTAR JUNIOR -55 bis 125
Datenblätter
SN74LVTH16373-EP 3.3-V ABT 16-Bit Transparent D-Type Latch With Tri-State Outputs datasheet
PDF, 945 Kb, Revision: B, Datei veröffentlicht: Jun 29, 2016
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Verpackung
| Pin | 56 |
| Package Type | GQL |
| Industry STD Term | BGA MICROSTAR JUNIOR |
| JEDEC Code | R-PBGA-N |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | H16373MEP |
| Width (mm) | 4.5 |
| Length (mm) | 7 |
| Thickness (mm) | .75 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1 |
| Mechanical Data | Herunterladen |
Parameter
| 3-State Output | Yes |
| Bits | 16 |
| F @ Nom Voltage(Max) | 160 Mhz |
| ICC @ Nom Voltage(Max) | 5 mA |
| Input Type | TTL |
| Operating Temperature Range | -40 to 85,-55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 64/-32 mA |
| Output Type | TTL |
| Package Group | BGA MICROSTAR JUNIOR |
| Package Size: mm2:W x L | 56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR) PKG |
| Rating | HiRel Enhanced Product |
| Technology Family | LVT |
| VCC(Max) | 3.6 V |
| VCC(Min) | 2.7 V |
| tpd @ Nom Voltage(Max) | 3.8 ns |
Öko-Plan
| RoHS | See ti.com |
Anwendungshinweise
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revision: B, Datei veröffentlicht: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)PDF, 105 Kb, Revision: A, Datei veröffentlicht: Aug 1, 1997
The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi - Understanding Advanced Bus-Interface Products Design GuidePDF, 253 Kb, Datei veröffentlicht: May 1, 1996
- Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, Datei veröffentlicht: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015
Modellreihe
Serie: SN74LVTH16373-EP (6)
- CLVTH16373IDGGREP CLVTH16373IDLREP CLVTH16373MGQLREP V62/04712-01XE V62/04712-01YE V62/04712-02ZA
Herstellerklassifikation
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers