Datasheet Texas Instruments SN74LVTH16241 — Datenblatt

HerstellerTexas Instruments
SerieSN74LVTH16241
Datasheet Texas Instruments SN74LVTH16241

3,3-V-ABT-16-Bit-Puffer / -Treiber mit 3-Zustands-Ausgängen

Datenblätter

3.3-V ABT 16-Bit Buffers/Drivers With 3-State Outputs datasheet
PDF, 723 Kb, Revision: D, Datei veröffentlicht: Nov 1, 2006
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Preise

Status

SN74LVTH16241DGGRSN74LVTH16241DL
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Verpackung

SN74LVTH16241DGGRSN74LVTH16241DL
N12
Pin4848
Package TypeDGGDL
Industry STD TermTSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY200025
CarrierLARGE T&RTUBE
Device MarkingLVTH16241LVTH16241
Width (mm)6.17.49
Length (mm)12.515.88
Thickness (mm)1.152.59
Pitch (mm).5.635
Max Height (mm)1.22.79
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsSN74LVTH16241DGGR
SN74LVTH16241DGGR
SN74LVTH16241DL
SN74LVTH16241DL
Bits1616
F @ Nom Voltage(Max), Mhz160160
ICC @ Nom Voltage(Max), mA0.0050.005
Operating Temperature Range, C-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-32/64-32/64
Package GroupTSSOPSSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
RatingCatalogCatalog
Schmitt TriggerNoNo
Technology FamilyLVTLVT
VCC(Max), V3.63.6
VCC(Min), V2.72.7
Voltage(Nom), V3.33.3
tpd @ Nom Voltage(Max), ns3.53.5

Öko-Plan

SN74LVTH16241DGGRSN74LVTH16241DL
RoHSCompliantCompliant

Anwendungshinweise

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Modellreihe

Serie: SN74LVTH16241 (2)

Herstellerklassifikation

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver