Datasheet Texas Instruments SN74LVTH16240 — Datenblatt

HerstellerTexas Instruments
SerieSN74LVTH16240
Datasheet Texas Instruments SN74LVTH16240

3,3-V-ABT-16-Bit-Puffer / -Treiber mit 3-Zustands-Ausgängen

Datenblätter

SN54LVTH16240, SN74LVTH16240 datasheet
PDF, 347 Kb, Revision: D, Datei veröffentlicht: Dec 1, 2006
Auszug aus dem Dokument

Preise

Status

SN74LVTH16240DGGRSN74LVTH16240DLSN74LVTH16240DLG4SN74LVTH16240DLRSN74LVTH16240DLRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

Verpackung

SN74LVTH16240DGGRSN74LVTH16240DLSN74LVTH16240DLG4SN74LVTH16240DLRSN74LVTH16240DLRG4
N12345
Pin4848484848
Package TypeDGGDLDLDLDL
Industry STD TermTSSOPSSOPSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2000252510001000
CarrierLARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingLVTH16240LVTH16240LVTH16240LVTH16240LVTH16240
Width (mm)6.17.497.497.497.49
Length (mm)12.515.8815.8815.8815.88
Thickness (mm)1.152.592.592.592.59
Pitch (mm).5.635.635.635.635
Max Height (mm)1.22.792.792.792.79
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsSN74LVTH16240DGGR
SN74LVTH16240DGGR
SN74LVTH16240DL
SN74LVTH16240DL
SN74LVTH16240DLG4
SN74LVTH16240DLG4
SN74LVTH16240DLR
SN74LVTH16240DLR
SN74LVTH16240DLRG4
SN74LVTH16240DLRG4
Bits1616161616
F @ Nom Voltage(Max), Mhz160160160160160
ICC @ Nom Voltage(Max), mA0.0050.0050.0050.0050.005
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-32/64-32/64-32/64-32/64-32/64
Package GroupTSSOPSSOPSSOPSSOPSSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyLVTLVTLVTLVTLVT
VCC(Max), V3.63.63.63.63.6
VCC(Min), V2.72.72.72.72.7
Voltage(Nom), V3.33.33.33.33.3
tpd @ Nom Voltage(Max), ns44444

Öko-Plan

SN74LVTH16240DGGRSN74LVTH16240DLSN74LVTH16240DLG4SN74LVTH16240DLRSN74LVTH16240DLRG4
RoHSCompliantCompliantCompliantCompliantCompliant

Anwendungshinweise

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Bus-Hold Circuit
    PDF, 418 Kb, Datei veröffentlicht: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Inverting Buffer/Driver