Datasheet Texas Instruments SN74LVT8980AIDWREP — Datenblatt

Erweiterte Produkt-Embedded-Testbus-Controller Ieee Std 1149.1 (Jtag) Tap Masters 24-SOIC -40 bis 85

Datenblätter

PDF, 830 Kb, Revision: A, Datei veröffentlicht: Oct 29, 2003

Auszug aus dem Dokument

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Bits	8
ICC @ Nom Voltage(Max)	7 mA
Input Type	TTL/CMOS
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	64/-32 mA
Output Type	LVTTL
Package Group	SOIC
Package Size: mm2:W x L	24SOIC: 160 mm2: 10.3 x 15.5(SOIC) PKG
Rating	HiRel Enhanced Product
Technology Family	LVT
VCC(Max)	3.6 V
VCC(Min)	2.7 V
tpd @ Nom Voltage(Max)	30 ns

RoHS

Compliant

Herunterladen
LVT Family Characteristics (Rev. A)
PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
Herunterladen
LVT-to-LVTH Conversion
PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Serie: SN74LVT8980A-EP (2)

Semiconductors > Space & High Reliability > Logic Products > Specialty Logic Products > Boundary Scan (JTAG)