Datasheet Texas Instruments SN74LVT573 — Datenblatt

HerstellerTexas Instruments
SerieSN74LVT573
Datasheet Texas Instruments SN74LVT573

3.3-V ABT Octal Transparente D-Latches mit 3-Zustands-Ausgängen

Datenblätter

3.3-V ABT Octal Transparent D-Type Latches datasheet
PDF, 1.1 Mb, Revision: D, Datei veröffentlicht: Jul 1, 1995
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Preise

Status

SN74LVT573DWSN74LVT573PWR
Lifecycle StatusNRND (Not recommended for new designs)NRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Verpackung

SN74LVT573DWSN74LVT573PWR
N12
Pin2020
Package TypeDWPW
Industry STD TermSOICTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY252000
CarrierTUBELARGE T&R
Device MarkingLVT573LX573
Width (mm)7.54.4
Length (mm)12.86.5
Thickness (mm)2.351
Pitch (mm)1.27.65
Max Height (mm)2.651.2
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Öko-Plan

SN74LVT573DWSN74LVT573PWR
RoHSCompliantCompliant

Anwendungshinweise

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Modellreihe

Serie: SN74LVT573 (2)

Herstellerklassifikation

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch