Datasheet Texas Instruments SN74LVT240A — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74LVT240A |
3,3-V-ABT-Oktalpuffer / Treiber mit 3-Zustands-Ausgängen
Datenblätter
SN74LVT240A datasheet
PDF, 1.1 Mb, Revision: K, Datei veröffentlicht: Jan 14, 2004
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Preise
Status
| SN74LVT240ADBR | SN74LVT240ADW | SN74LVT240ADWE4 | SN74LVT240ADWG4 | SN74LVT240ADWR | SN74LVT240ANSR | SN74LVT240APW | SN74LVT240APWG4 | SN74LVT240APWR | SN74LVT240APWRE4 | |
|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No | No | No | No |
Verpackung
| SN74LVT240ADBR | SN74LVT240ADW | SN74LVT240ADWE4 | SN74LVT240ADWG4 | SN74LVT240ADWR | SN74LVT240ANSR | SN74LVT240APW | SN74LVT240APWG4 | SN74LVT240APWR | SN74LVT240APWRE4 | |
|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DB | DW | DW | DW | DW | NS | PW | PW | PW | PW |
| Industry STD Term | SSOP | SOIC | SOIC | SOIC | SOIC | SOP | TSSOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 2000 | 25 | 25 | 25 | 2000 | 2000 | 70 | 70 | 2000 | 2000 |
| Carrier | LARGE T&R | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | LX240A | LVT240A | LVT240A | LVT240A | LVT240A | LVT240A | LX240A | LX240A | LX240A | LX240A |
| Width (mm) | 5.3 | 7.5 | 7.5 | 7.5 | 7.5 | 5.3 | 4.4 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 7.2 | 12.8 | 12.8 | 12.8 | 12.8 | 12.6 | 6.5 | 6.5 | 6.5 | 6.5 |
| Thickness (mm) | 1.95 | 2.35 | 2.35 | 2.35 | 2.35 | 1.95 | 1 | 1 | 1 | 1 |
| Pitch (mm) | .65 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
| Max Height (mm) | 2 | 2.65 | 2.65 | 2.65 | 2.65 | 2 | 1.2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | SN74LVT240ADBR | SN74LVT240ADW | SN74LVT240ADWE4 | SN74LVT240ADWG4 | SN74LVT240ADWR | SN74LVT240ANSR | SN74LVT240APW | SN74LVT240APWG4 | SN74LVT240APWR | SN74LVT240APWRE4 |
|---|---|---|---|---|---|---|---|---|---|---|
| Bits | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| F @ Nom Voltage(Max), Mhz | 160 | 160 | 160 | 160 | 160 | 160 | 160 | 160 | 160 | 160 |
| ICC @ Nom Voltage(Max), mA | 0.005 | 0.005 | 0.005 | 0.005 | 0.005 | 0.005 | 0.005 | 0.005 | 0.005 | 0.005 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Drive (IOL/IOH)(Max), mA | -32/64 | -32/64 | -32/64 | -32/64 | -32/64 | -32/64 | -32/64 | -32/64 | -32/64 | -32/64 |
| Package Group | SSOP | SOIC | SOIC | SOIC | SOIC | SO | TSSOP | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SO: 98 mm2: 7.8 x 12.6(SO) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No | No | No | No |
| Technology Family | LVT | LVT | LVT | LVT | LVT | LVT | LVT | LVT | LVT | LVT |
| VCC(Max), V | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 |
| VCC(Min), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
| Voltage(Nom), V | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 |
| tpd @ Nom Voltage(Max), ns | 3.8 | 3.8 | 3.8 | 3.8 | 3.8 | 3.8 | 3.8 | 3.8 | 3.8 | 3.8 |
Öko-Plan
| SN74LVT240ADBR | SN74LVT240ADW | SN74LVT240ADWE4 | SN74LVT240ADWG4 | SN74LVT240ADWR | SN74LVT240ANSR | SN74LVT240APW | SN74LVT240APWG4 | SN74LVT240APWR | SN74LVT240APWRE4 | |
|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Modellreihe
Serie: SN74LVT240A (10)
Herstellerklassifikation
- Semiconductors> Logic> Buffer/Driver/Transceiver> Inverting Buffer/Driver