Datasheet Texas Instruments SN74HC193 — Datenblatt

HerstellerTexas Instruments
SerieSN74HC193
Datasheet Texas Instruments SN74HC193

4-Bit-Synchron-Auf / Ab-Zähler (Dual Clock With Clear)

Datenblätter

SN54HC193, SN74HC193 datasheet
PDF, 1.1 Mb, Revision: D, Datei veröffentlicht: Oct 2, 2003
Auszug aus dem Dokument

Preise

Status

SN74HC193DSN74HC193DE4SN74HC193DRSN74HC193DRE4SN74HC193DTSN74HC193NSN74HC193NE4SN74HC193NSRSN74HC193PWSN74HC193PWG4SN74HC193PWRSN74HC193PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNoNoNo

Verpackung

SN74HC193DSN74HC193DE4SN74HC193DRSN74HC193DRE4SN74HC193DTSN74HC193NSN74HC193NE4SN74HC193NSRSN74HC193PWSN74HC193PWG4SN74HC193PWRSN74HC193PWRG4
N123456789101112
Pin161616161616161616161616
Package TypeDDDDDNNNSPWPWPWPW
Industry STD TermSOICSOICSOICSOICSOICPDIPPDIPSOPTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY40402500250025025252000909020002000
CarrierTUBETUBELARGE T&RLARGE T&RSMALL T&RTUBETUBELARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingHC193HC193HC193HC193HC193SN74HC193NSN74HC193NHC193HC193HC193HC193HC193
Width (mm)3.913.913.913.913.916.356.355.34.44.44.44.4
Length (mm)9.99.99.99.99.919.319.310.35555
Thickness (mm)1.581.581.581.581.583.93.91.951111
Pitch (mm)1.271.271.271.271.272.542.541.27.65.65.65.65
Max Height (mm)1.751.751.751.751.755.085.0821.21.21.21.2
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Parameter

Parameters / ModelsSN74HC193D
SN74HC193D
SN74HC193DE4
SN74HC193DE4
SN74HC193DR
SN74HC193DR
SN74HC193DRE4
SN74HC193DRE4
SN74HC193DT
SN74HC193DT
SN74HC193N
SN74HC193N
SN74HC193NE4
SN74HC193NE4
SN74HC193NSR
SN74HC193NSR
SN74HC193PW
SN74HC193PW
SN74HC193PWG4
SN74HC193PWG4
SN74HC193PWR
SN74HC193PWR
SN74HC193PWRG4
SN74HC193PWRG4
Approx. Price (US$)0.13 | 1ku
Bits44444444444
Bits(#)4
F @ Nom Voltage(Max), Mhz2828282828282828282828
F @ Nom Voltage(Max)(Mhz)28
FunctionCounterCounterCounterCounterCounterCounterCounterCounterCounterCounterCounterCounter
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.080.080.080.080.080.08
ICC @ Nom Voltage(Max)(mA)0.08
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA5.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.2
Output Drive (IOL/IOH)(Max)(mA)5.2/-5.2
Package GroupSOICSOICSOICSOICSOICPDIPPDIPSOTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)16SO: 80 mm2: 7.8 x 10.2(SO)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Technology FamilyHCHCHCHCHCHCHCHCHCHCHCHC
TypeBinaryBinaryBinaryBinaryBinaryBinaryBinaryBinaryBinaryBinaryBinaryBinary
VCC(Max), V66666666666
VCC(Max)(V)6
VCC(Min), V22222222222
VCC(Min)(V)2
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,5
Voltage(Nom)(V)3.3
5
tpd @ Nom Voltage(Max), ns5555555555555555555555
tpd @ Nom Voltage(Max)(ns)55

Öko-Plan

SN74HC193DSN74HC193DE4SN74HC193DRSN74HC193DRE4SN74HC193DTSN74HC193NSN74HC193NE4SN74HC193NSRSN74HC193PWSN74HC193PWG4SN74HC193PWRSN74HC193PWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYesYes

Anwendungshinweise

  • HCMOS Design Considerations (Rev. A)
    PDF, 207 Kb, Revision: A, Datei veröffentlicht: Sep 9, 2002
    This document describes a potential problem designers may encounter when using high-speed CMOS (HC) logic devices. There also is a broad range of CMOS-system to non-CMOS-system interfaces that need to be considered. The design engineer inevitably encounters these interfaces. Key considerations for handling these interfaces are also discussed in this book.

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Specialty Logic> Counter/Arithmetic/Parity Function