Datasheet Texas Instruments SN74GTL2006PWR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74GTL2006 |
| Artikelnummer | SN74GTL2006PWR |
13-Bit-GTL- / GTL / GTL + zu LVTTL-Übersetzer 28-TSSOP -40 bis 85
Datenblätter
SN74GTL2006 datasheet
PDF, 765 Kb, Datei veröffentlicht: Dec 17, 2004
Auszug aus dem Dokument
Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Verpackung
| Pin | 28 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | GK2006 |
| Width (mm) | 4.4 |
| Length (mm) | 9.7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Herunterladen |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)PDF, 184 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided. - Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, Datei veröffentlicht: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
Modellreihe
Serie: SN74GTL2006 (1)
- SN74GTL2006PWR
Herstellerklassifikation
- Semiconductors > Logic > Universal Bus Function > Universal Bus Transceiver (UBT)