Datasheet Texas Instruments SN74GTL2003 — Datenblatt

HerstellerTexas Instruments
SerieSN74GTL2003
Datasheet Texas Instruments SN74GTL2003

8-Bit-bidirektionaler Niederspannungsübersetzer

Datenblätter

SN74GTL2003 8-Bit Bidirectional Low-Voltage Translator datasheet
PDF, 994 Kb, Revision: C, Datei veröffentlicht: Aug 30, 2016
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Preise

Status

SN74GTL2003PWSN74GTL2003PWRSN74GTL2003RKSR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesNo

Verpackung

SN74GTL2003PWSN74GTL2003PWRSN74GTL2003RKSR
N123
Pin202020
Package TypePWPWRKS
Industry STD TermTSSOPTSSOPVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PQFP-N
Package QTY7020003000
CarrierTUBELARGE T&RLARGE T&R
Device MarkingGK2003GK2003GK2003
Width (mm)4.44.42.5
Length (mm)6.56.54.5
Thickness (mm)11.9
Pitch (mm).65.65.5
Max Height (mm)1.21.21
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsSN74GTL2003PW
SN74GTL2003PW
SN74GTL2003PWR
SN74GTL2003PWR
SN74GTL2003RKSR
SN74GTL2003RKSR
Bits888
F @ Nom Voltage(Max), Mhz959595
ICC @ Nom Voltage(Max), mA0.0010.0010.001
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA646464
Package GroupTSSOPTSSOPVQFN
Package Size: mm2:W x L, PKG20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20VQFN: 11 mm2: 2.5 x 4.5(VQFN)
RatingCatalogCatalogCatalog
Schmitt TriggerNoNoNo
Technology FamilyGTLGTLGTL
VCC(Max), V5.55.55.5
VCC(Min), V111
Voltage(Nom), V1,1.8,2.5,3.3,51,1.8,2.5,3.3,51,1.8,2.5,3.3,5
tpd @ Nom Voltage(Max), ns5.5,0.255.5,0.255.5,0.25

Öko-Plan

SN74GTL2003PWSN74GTL2003PWRSN74GTL2003RKSR
RoHSCompliantCompliantCompliant

Anwendungshinweise

  • GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)
    PDF, 184 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
    GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided.
  • VOLTAGE LEVEL TRANSLATION (SL) - Family
    PDF, 111 Kb, Datei veröffentlicht: Sep 21, 2011
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, Datei veröffentlicht: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Universal Bus Function> Universal Bus Transceiver (UBT)