Datasheet Texas Instruments SN74GTL16616 — Datenblatt

Hersteller	Texas Instruments
Serie	SN74GTL16616

17-Bit-LVTTL-zu-GTL / GTL + -Universal-Bus-Transceiver mit gepufferten Taktausgängen

Datenblätter

PDF, 701 Kb, Revision: H, Datei veröffentlicht: Aug 6, 2001

Auszug aus dem Dokument

	SN74GTL16616DLR
Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

Parameters / Models	SN74GTL16616DLR
Bits	17
F @ Nom Voltage(Max), Mhz	95
ICC @ Nom Voltage(Max), mA	120
Operating Temperature Range, C	-40 to 85
Output Drive (IOL/IOH)(Max), mA	64
Package Group	SSOP
Package Size: mm2:W x L, PKG	56SSOP: 191 mm2: 10.35 x 18.42(SSOP)
Rating	Catalog
Schmitt Trigger	No
Technology Family	GTL
VCC(Max), V	5.25
VCC(Min), V	3.15
Voltage(Nom), V	3.3,5
tpd @ Nom Voltage(Max), ns	14.4

	SN74GTL16616DLR
RoHS	Compliant

Herunterladen
GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)
PDF, 184 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided.
Herunterladen
Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
PDF, 209 Kb, Datei veröffentlicht: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Serie: SN74GTL16616 (1)