Datasheet Texas Instruments SN74FB2040 — Datenblatt

HerstellerTexas Instruments
SerieSN74FB2040
Datasheet Texas Instruments SN74FB2040

8-Bit-TTL / BTL-Transceiver

Datenblätter

8-Bit TTL/BTL Transceiver datasheet
PDF, 138 Kb, Revision: N, Datei veröffentlicht: Mar 7, 2002
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Preise

Status

SN74FB2040RCG3
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

SN74FB2040RCG3
N1
Pin52
Package TypeRC
Industry STD TermQFP
JEDEC CodeS-PQFP-G
Package QTY96
CarrierJEDEC TRAY (5+1)
Device MarkingFB2040
Width (mm)10
Length (mm)10
Thickness (mm)2
Pitch (mm).65
Max Height (mm)2.45
Mechanical DataHerunterladen

Parameter

Parameters / ModelsSN74FB2040RCG3
SN74FB2040RCG3
Bits8
F @ Nom Voltage(Max), Mhz150
ICC @ Nom Voltage(Max), mA70
Operating Temperature Range, C0 to 70
Output Drive (IOL/IOH)(Max), mA100/-32
Package GroupQFP
Package Size: mm2:W x L, PKG52QFP: 174 mm2: 13.2 x 13.2(QFP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyFB
VCC(Max), V5.5
VCC(Min), V4.5
Voltage(Nom), V5
tpd @ Nom Voltage(Max), ns8.2

Öko-Plan

SN74FB2040RCG3
RoHSCompliant

Anwendungshinweise

  • Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C)
    PDF, 65 Kb, Revision: C, Datei veröffentlicht: Mar 1, 1997
    BTL- and Futurebus-compatible transceivers and switching level meet the requirements of today?s high-speed data-communications and provide significant performance advantages over conventional backplane implementations. This document discusses the current and next generation of BTL/Futurebus Transceivers and the design trade-offs required when using these devices.
  • GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)
    PDF, 184 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
    GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided.
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, Datei veröffentlicht: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Modellreihe

Serie: SN74FB2040 (1)

Herstellerklassifikation

  • Semiconductors> Logic> Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)