Datasheet Texas Instruments SN74FB2033A — Datenblatt
Hersteller | Texas Instruments |
Serie | SN74FB2033A |
8-Bit-TTL / BTL-registrierter Transceiver
Datenblätter
8-Bit TTL/BTL Registered Transceiver datasheet
PDF, 740 Kb, Revision: M, Datei veröffentlicht: Sep 10, 2001
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Preise
Status
SN74FB2033ARCRG3 | |
---|---|
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Verpackung
SN74FB2033ARCRG3 | |
---|---|
N | 1 |
Pin | 52 |
Package Type | RC |
Industry STD Term | QFP |
JEDEC Code | S-PQFP-G |
Package QTY | 500 |
Carrier | LARGE T&R |
Device Marking | FB2033A |
Width (mm) | 10 |
Length (mm) | 10 |
Thickness (mm) | 2 |
Pitch (mm) | .65 |
Max Height (mm) | 2.45 |
Mechanical Data | Herunterladen |
Parameter
Parameters / Models | SN74FB2033ARCRG3 |
---|---|
Bits | 8 |
F @ Nom Voltage(Max), Mhz | 150 |
ICC @ Nom Voltage(Max), mA | 70 |
Operating Temperature Range, C | 0 to 70 |
Output Drive (IOL/IOH)(Max), mA | 100/-32 |
Package Group | QFP |
Package Size: mm2:W x L, PKG | 52QFP: 174 mm2: 13.2 x 13.2(QFP) |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | FB |
VCC(Max), V | 5.25 |
VCC(Min), V | 4.75 |
Voltage(Nom), V | 5 |
tpd @ Nom Voltage(Max), ns | 8 |
Öko-Plan
SN74FB2033ARCRG3 | |
---|---|
RoHS | Compliant |
Anwendungshinweise
- Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C)PDF, 65 Kb, Revision: C, Datei veröffentlicht: Mar 1, 1997
BTL- and Futurebus-compatible transceivers and switching level meet the requirements of today?s high-speed data-communications and provide significant performance advantages over conventional backplane implementations. This document discusses the current and next generation of BTL/Futurebus Transceivers and the design trade-offs required when using these devices. - GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)PDF, 184 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided. - Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, Datei veröffentlicht: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
Modellreihe
Serie: SN74FB2033A (1)
Herstellerklassifikation
- Semiconductors> Logic> Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)