Datasheet Texas Instruments SN74FB1653 — Datenblatt

Hersteller	Texas Instruments
Serie	SN74FB1653

17-Bit-Universal-Speicher-Transceiver LVTTL / BTL mit gepufferten Taktleitungen

Datenblätter

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PDF, 262 Kb, Revision: H, Datei veröffentlicht: Mar 10, 2004

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Preise

Status

	SN74FB1653PCA
Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Verpackung

	SN74FB1653PCA
N	1
Pin	100
Package Type	PCA
Industry STD Term	HLQFP
JEDEC Code	S-PQFP-G
Package QTY	90
Carrier	JEDEC TRAY (10+1)
Device Marking	FB1653
Width (mm)	14
Length (mm)	14
Thickness (mm)	1.4
Pitch (mm)	.5
Max Height (mm)	1.6
Mechanical Data	Herunterladen

Parameter

Parameters / Models	SN74FB1653PCA
Bits	17
F @ Nom Voltage(Max), Mhz	90
ICC @ Nom Voltage(Max), mA	140
Operating Temperature Range, C	0 to 70
Output Drive (IOL/IOH)(Max), mA	100/-32
Package Group	HLQFP
Package Size: mm2:W x L, PKG	100HLQFP: 256 mm2: 16 x 16(HLQFP)
Rating	Catalog
Schmitt Trigger	No
Technology Family	FB
VCC(Max), V	5.5
VCC(Min), V	4.5
Voltage(Nom), V	5
tpd @ Nom Voltage(Max), ns	15.4

Öko-Plan

	SN74FB1653PCA
RoHS	Compliant

Anwendungshinweise

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Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C)
PDF, 65 Kb, Revision: C, Datei veröffentlicht: Mar 1, 1997
BTL- and Futurebus-compatible transceivers and switching level meet the requirements of today?s high-speed data-communications and provide significant performance advantages over conventional backplane implementations. This document discusses the current and next generation of BTL/Futurebus Transceivers and the design trade-offs required when using these devices.
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GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)
PDF, 184 Kb, Revision: A, Datei veröffentlicht: Mar 1, 1997
GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided.
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Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
PDF, 209 Kb, Datei veröffentlicht: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Modellreihe

Serie: SN74FB1653 (1)

SN74FB1653PCA

Herstellerklassifikation

Semiconductors> Logic> Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)