Datasheet Texas Instruments SN74F112 — Datenblatt

HerstellerTexas Instruments
SerieSN74F112
Datasheet Texas Instruments SN74F112

Dual JK Negative-Edge-Triggered Flip-Flop mit Clear und Preset

Datenblätter

Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset datasheet
PDF, 639 Kb, Revision: A, Datei veröffentlicht: Oct 1, 1993
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Preise

Status

SN74F112DSN74F112DRSN74F112DRE4SN74F112DRG4SN74F112NSN74F112NE4SN74F112NSRSN74F112NSRE4SN74F112NSRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesNoNoNoNoNoNo

Verpackung

SN74F112DSN74F112DRSN74F112DRE4SN74F112DRG4SN74F112NSN74F112NE4SN74F112NSRSN74F112NSRE4SN74F112NSRG4
N123456789
Pin161616161616161616
Package TypeDDDDNNNSNSNS
Industry STD TermSOICSOICSOICSOICPDIPPDIPSOPSOPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY402500250025002525200020002000
CarrierTUBELARGE T&RLARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingF112F112F112F112SN74F112NSN74F112N74F11274F11274F112
Width (mm)3.913.913.913.916.356.355.35.35.3
Length (mm)9.99.99.99.919.319.310.310.310.3
Thickness (mm)1.581.581.581.583.93.91.951.951.95
Pitch (mm)1.271.271.271.272.542.541.271.271.27
Max Height (mm)1.751.751.751.755.085.08222
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Parameter

Parameters / ModelsSN74F112D
SN74F112D
SN74F112DR
SN74F112DR
SN74F112DRE4
SN74F112DRE4
SN74F112DRG4
SN74F112DRG4
SN74F112N
SN74F112N
SN74F112NE4
SN74F112NE4
SN74F112NSR
SN74F112NSR
SN74F112NSRE4
SN74F112NSRE4
SN74F112NSRG4
SN74F112NSRG4
Bits222222222
F @ Nom Voltage(Max), Mhz707070707070707070
ICC @ Nom Voltage(Max), mA191919191919191919
Output Drive (IOL/IOH)(Max), mA-1/20-1/20-1/20-1/20-1/20-1/20-1/20-1/20-1/20
Package GroupSOICSOICSOICSOICPDIPPDIPSOSOSO
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)16SO: 80 mm2: 7.8 x 10.2(SO)16SO: 80 mm2: 7.8 x 10.2(SO)16SO: 80 mm2: 7.8 x 10.2(SO)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyFFFFFFFFF
VCC(Max), V5.55.55.55.55.55.55.55.55.5
VCC(Min), V4.54.54.54.54.54.54.54.54.5
Voltage(Nom), V555555555
tpd @ Nom Voltage(Max), ns7.57.57.57.57.57.57.57.57.5

Öko-Plan

SN74F112DSN74F112DRSN74F112DRE4SN74F112DRG4SN74F112NSN74F112NE4SN74F112NSRSN74F112NSRE4SN74F112NSRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop