Datasheet Texas Instruments SN74BCT8374A — Datenblatt

HerstellerTexas Instruments
SerieSN74BCT8374A
Datasheet Texas Instruments SN74BCT8374A

Scan-Testgerät mit kantengetriggerten Flip-Flops vom Typ Octal D.

Datenblätter

Scan Test Devices With Octal D-Type Edge-Triggered Flip-Flops datasheet
PDF, 435 Kb, Revision: E, Datei veröffentlicht: Jul 1, 1996
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Preise

Status

SN74BCT8374ADW
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

SN74BCT8374ADW
N1
Pin24
Package TypeDW
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY25
CarrierTUBE
Device MarkingBCT8374A
Width (mm)7.5
Length (mm)15.4
Thickness (mm)2.35
Pitch (mm)1.27
Max Height (mm)2.65
Mechanical DataHerunterladen

Parameter

Parameters / ModelsSN74BCT8374ADW
SN74BCT8374ADW
Bits8
F @ Nom Voltage(Max), Mhz70
ICC @ Nom Voltage(Max), mA52
Operating Temperature Range, C0 to 70
Output Drive (IOL/IOH)(Max), mA64/-15
Package GroupSOIC
Package Size: mm2:W x L, PKG24SOIC: 160 mm2: 10.3 x 15.5(SOIC)
RatingCatalog
Technology FamilyBCT
VCC(Max), V5.5
VCC(Min), V4.5
Voltage(Nom), V5
tpd @ Nom Voltage(Max), ns10

Öko-Plan

SN74BCT8374ADW
RoHSCompliant

Anwendungshinweise

  • Programming CPLDs Via the 'LVT8986 LASP
    PDF, 819 Kb, Datei veröffentlicht: Nov 1, 2005
    This application report summarizes key information required for understanding the 'LVT8986 linking addressable scan ports (LASPs) multidrop addressable IEEE Std 1149.1 (JTAG) test access port (TAP) transceiver. This report includes information about the 'LVT8986 secondary TAPs, bypass and linking shadow protocol, scan-path description languages, serial vector format files, and an example of how to

Modellreihe

Serie: SN74BCT8374A (1)

Herstellerklassifikation

  • Semiconductors> Logic> Specialty Logic> Boundary Scan (JTAG) Logic