Datasheet Texas Instruments SN74BCT8373A — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74BCT8373A |
Boundary-Scan-Testgerät IEEE Std 1149.1 (JTAG) mit oktalen D-Latches
Datenblätter
Scan Test Devices With Octal D-Type Latches datasheet
PDF, 421 Kb, Revision: F, Datei veröffentlicht: Jul 1, 1996
Auszug aus dem Dokument
Preise
Status
| SN74BCT8373ADW | |
|---|---|
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| SN74BCT8373ADW | |
|---|---|
| N | 1 |
| Pin | 24 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 25 |
| Carrier | TUBE |
| Device Marking | BCT8373A |
| Width (mm) | 7.5 |
| Length (mm) | 15.4 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Herunterladen |
Parameter
| Parameters / Models | SN74BCT8373ADW |
|---|---|
| Bits | 8 |
| F @ Nom Voltage(Max), Mhz | 70 |
| ICC @ Nom Voltage(Max), mA | 52 |
| Operating Temperature Range, C | 0 to 70 |
| Output Drive (IOL/IOH)(Max), mA | 64/-15 |
| Package Group | SOIC |
| Package Size: mm2:W x L, PKG | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) |
| Rating | Catalog |
| Technology Family | BCT |
| VCC(Max), V | 5.5 |
| VCC(Min), V | 4.5 |
| Voltage(Nom), V | 5 |
| tpd @ Nom Voltage(Max), ns | 9.5 |
Öko-Plan
| SN74BCT8373ADW | |
|---|---|
| RoHS | Compliant |
Anwendungshinweise
- Programming CPLDs Via the 'LVT8986 LASPPDF, 819 Kb, Datei veröffentlicht: Nov 1, 2005
This application report summarizes key information required for understanding the 'LVT8986 linking addressable scan ports (LASPs) multidrop addressable IEEE Std 1149.1 (JTAG) test access port (TAP) transceiver. This report includes information about the 'LVT8986 secondary TAPs, bypass and linking shadow protocol, scan-path description languages, serial vector format files, and an example of how to
Modellreihe
Serie: SN74BCT8373A (1)
Herstellerklassifikation
- Semiconductors> Logic> Specialty Logic> Boundary Scan (JTAG) Logic