Datasheet Texas Instruments SN74AUC2G02 — Datenblatt
Hersteller | Texas Instruments |
Serie | SN74AUC2G02 |
DUAL 2-INPUT POSITIVE-NOR GATE
Datenblätter
SN74AUC2G02 datasheet
PDF, 942 Kb, Revision: C, Datei veröffentlicht: Jan 11, 2007
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Preise
Status
SN74AUC2G02DCTR | SN74AUC2G02DCUR | SN74AUC2G02DCURE4 | SN74AUC2G02YZPR | |
---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes | No | Yes | Yes |
Verpackung
SN74AUC2G02DCTR | SN74AUC2G02DCUR | SN74AUC2G02DCURE4 | SN74AUC2G02YZPR | |
---|---|---|---|---|
N | 1 | 2 | 3 | 4 |
Pin | 8 | 8 | 8 | 8 |
Package Type | DCT | DCU | DCU | YZP |
Industry STD Term | SSOP | VSSOP | VSSOP | DSBGA |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-XBGA-N |
Package QTY | 3000 | 3000 | 3000 | |
Carrier | LARGE T&R | LARGE T&R | LARGE T&R | |
Device Marking | Z | UR | UBN | |
Width (mm) | 2.8 | 2 | 2 | 2.25 |
Length (mm) | 2.95 | 2.3 | 2.3 | 1.25 |
Thickness (mm) | 1.29 | .85 | .85 | .31 |
Pitch (mm) | .65 | .5 | .5 | .5 |
Max Height (mm) | 1.3 | .9 | .9 | .5 |
Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
Parameters / Models | SN74AUC2G02DCTR | SN74AUC2G02DCUR | SN74AUC2G02DCURE4 | SN74AUC2G02YZPR |
---|---|---|---|---|
3-State Output | No | No | No | No |
Approx. Price (US$) | 0.14 | 1ku | |||
Bits | 2 | 2 | 2 | |
Bits(#) | 2 | |||
F @ Nom Voltage(Max), Mhz | 250 | 250 | 250 | |
F @ Nom Voltage(Max)(Mhz) | 250 | |||
Gate Type | NOR | NOR | NOR | NOR |
ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 | |
ICC @ Nom Voltage(Max)(mA) | 0.01 | |||
Logic | True | True | True | True |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | |
Operating Temperature Range(C) | -40 to 85 | |||
Output Drive (IOL/IOH)(Max), mA | 9/-9 | 9/-9 | 9/-9 | |
Output Drive (IOL/IOH)(Max)(mA) | 9/-9 | |||
Package Group | SM8 | VSSOP | VSSOP | DSBGA |
Package Size: mm2:W x L, PKG | 8SM8: 12 mm2: 4 x 2.95(SM8) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | See datasheet (DSBGA) | |
Package Size: mm2:W x L (PKG) | See datasheet (DSBGA) | |||
Rating | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No |
Special Features | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF low power consumption low tpd | IOFF,low power consumption,low tpd |
Sub-Family | NOR Gate | NOR Gate | NOR Gate | NOR Gate |
Technology Family | AUC | AUC | AUC | AUC |
VCC(Max), V | 2.7 | 2.7 | 2.7 | |
VCC(Max)(V) | 2.7 | |||
VCC(Min), V | 0.8 | 0.8 | 0.8 | |
VCC(Min)(V) | 0.8 | |||
Voltage(Nom), V | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | |
Voltage(Nom)(V) | 0.8 1.2 1.5 1.8 2.5 | |||
tpd @ Nom Voltage(Max), ns | 8,3.5,2.2,1.8,1.3 | 8,3.5,2.2,1.8,1.3 | 8,3.5,2.2,1.8,1.3 | |
tpd @ Nom Voltage(Max)(ns) | 8 3.5 2.2 1.8 1.3 |
Öko-Plan
SN74AUC2G02DCTR | SN74AUC2G02DCUR | SN74AUC2G02DCURE4 | SN74AUC2G02YZPR | |
---|---|---|---|---|
RoHS | Compliant | Compliant | Not Compliant | Compliant |
Pb Free | No |
Anwendungshinweise
- Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus DevicesPDF, 374 Kb, Datei veröffentlicht: Mar 21, 2003
System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V
Modellreihe
Serie: SN74AUC2G02 (4)
Herstellerklassifikation
- Semiconductors> Logic> Little Logic