Datasheet Texas Instruments SN74AUC1G74 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74AUC1G74 |
Single Positive-Edge-Triggered D-Type Flip-Flop mit Clear und Preset
Datenblätter
SN74AUC1G74 datasheet
PDF, 1.3 Mb, Revision: D, Datei veröffentlicht: Jun 25, 2007
Auszug aus dem Dokument
Preise
Status
| SN74AUC1G74DCTR | SN74AUC1G74DCTRE4 | SN74AUC1G74DCTRG4 | SN74AUC1G74DCUR | SN74AUC1G74DCURE4 | SN74AUC1G74DCURG4 | SN74AUC1G74RSER | SN74AUC1G74RSERG4 | SN74AUC1G74YZPR | |
|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | Yes | Yes | No | Yes | Yes | Yes | Yes |
Verpackung
| SN74AUC1G74DCTR | SN74AUC1G74DCTRE4 | SN74AUC1G74DCTRG4 | SN74AUC1G74DCUR | SN74AUC1G74DCURE4 | SN74AUC1G74DCURG4 | SN74AUC1G74RSER | SN74AUC1G74RSERG4 | SN74AUC1G74YZPR | |
|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Package Type | DCT | DCT | DCT | DCU | DCU | DCU | RSE | RSE | YZP |
| Industry STD Term | SSOP | SSOP | SSOP | VSSOP | VSSOP | VSSOP | UQFN | UQFN | DSBGA |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | S-PQFP-N | S-PQFP-N | R-XBGA-N |
| Package QTY | 3000 | 3000 | 3000 | 3000 | 3000 | 3000 | 3000 | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | U74 | U74 | U74 | 74 | U74R | U74R | UP | UP | UPN |
| Width (mm) | 2.8 | 2.8 | 2.8 | 2 | 2 | 2 | 1.5 | 1.5 | 2.25 |
| Length (mm) | 2.95 | 2.95 | 2.95 | 2.3 | 2.3 | 2.3 | 1.5 | 1.5 | 1.25 |
| Thickness (mm) | 1.29 | 1.29 | 1.29 | .85 | .85 | .85 | .55 | .55 | .31 |
| Pitch (mm) | .65 | .65 | .65 | .5 | .5 | .5 | .5 | .5 | .5 |
| Max Height (mm) | 1.3 | 1.3 | 1.3 | .9 | .9 | .9 | .6 | .6 | .5 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | SN74AUC1G74DCTR | SN74AUC1G74DCTRE4 | SN74AUC1G74DCTRG4 | SN74AUC1G74DCUR | SN74AUC1G74DCURE4 | SN74AUC1G74DCURG4 | SN74AUC1G74RSER | SN74AUC1G74RSERG4 | SN74AUC1G74YZPR |
|---|---|---|---|---|---|---|---|---|---|
| 3-State Output | No | No | No | No | No | No | No | No | No |
| Bits | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| F @ Nom Voltage(Max), Mhz | 250 | 250 | 250 | 250 | 250 | 250 | 250 | 250 | 250 |
| Gate Type | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP |
| ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 |
| Logic | True | True | True | True | True | True | True | True | True |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Drive (IOL/IOH)(Max), mA | 9/-9 | 9/-9 | 9/-9 | 9/-9 | 9/-9 | 9/-9 | 9/-9 | 9/-9 | 9/-9 |
| Package Group | SM8 | SM8 | SM8 | VSSOP | VSSOP | VSSOP | UQFN | UQFN | DSBGA |
| Package Size: mm2:W x L, PKG | 8SM8: 12 mm2: 4 x 2.95(SM8) | 8SM8: 12 mm2: 4 x 2.95(SM8) | 8SM8: 12 mm2: 4 x 2.95(SM8) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8UQFN: 2 mm2: 1.5 x 1.5(UQFN) | 8UQFN: 2 mm2: 1.5 x 1.5(UQFN) | See datasheet (DSBGA) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No | No | No |
| Special Features | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd |
| Sub-Family | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop |
| Technology Family | AUC | AUC | AUC | AUC | AUC | AUC | AUC | AUC | AUC |
| VCC(Max), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
| VCC(Min), V | 0.8 | 0.8 | 0.8 | 0.8 | 0.8 | 0.8 | 0.8 | 0.8 | 0.8 |
| Voltage(Nom), V | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 |
| tpd @ Nom Voltage(Max), ns | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 | 9.6,3.8,3,1.5,1.1 |
Öko-Plan
| SN74AUC1G74DCTR | SN74AUC1G74DCTRE4 | SN74AUC1G74DCTRG4 | SN74AUC1G74DCUR | SN74AUC1G74DCURE4 | SN74AUC1G74DCURG4 | SN74AUC1G74RSER | SN74AUC1G74RSERG4 | SN74AUC1G74YZPR | |
|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Anwendungshinweise
- Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus DevicesPDF, 374 Kb, Datei veröffentlicht: Mar 21, 2003
System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V
Modellreihe
Serie: SN74AUC1G74 (9)
Herstellerklassifikation
- Semiconductors> Logic> Little Logic