Datasheet Texas Instruments SN74ALVCH16721 — Datenblatt

Hersteller	Texas Instruments
Serie	SN74ALVCH16721

Datenblätter

Preise

Status

Verpackung

Parameter

Parameters / Models	SN74ALVCH16721DGGR	SN74ALVCH16721DL	SN74ALVCH16721DLR
3-State Output	Yes	Yes	Yes
Bits	20	20	20
F @ Nom Voltage(Max), Mhz	150	150	150
ICC @ Nom Voltage(Max), mA	0.04	0.04	0.04
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), mA	24/-24	24/-24	24/-24
Package Group	TSSOP	SSOP	SSOP
Package Size: mm2:W x L, PKG	56TSSOP: 113 mm2: 8.1 x 14(TSSOP)	56SSOP: 191 mm2: 10.35 x 18.42(SSOP)	56SSOP: 191 mm2: 10.35 x 18.42(SSOP)
Rating	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No
Technology Family	ALVC	ALVC	ALVC
VCC(Max), V	3.6	3.6	3.6
VCC(Min), V	1.65	1.65	1.65
Voltage(Nom), V	1.8,2.5,2.7,3.3	1.8,2.5,2.7,3.3	1.8,2.5,2.7,3.3
tpd @ Nom Voltage(Max), ns	5.6,5.1,4.3	5.6,5.1,4.3	5.6,5.1,4.3

Öko-Plan

Anwendungshinweise

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  TI SN74ALVC16835 Component Specification Analysis for PC100
  PDF, 43 Kb, Datei veröffentlicht: Aug 3, 1998
  The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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  Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
  PDF, 96 Kb, Revision: A, Datei veröffentlicht: May 13, 1998
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  Bus-Hold Circuit
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  PDF, 895 Kb, Revision: B, Datei veröffentlicht: May 22, 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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  Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
  PDF, 154 Kb, Revision: A, Datei veröffentlicht: Sep 8, 1999
  In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

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• Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop