Datasheet Texas Instruments SN74ALVCH162244 — Datenblatt

Hersteller	Texas Instruments
Serie	SN74ALVCH162244

Datenblätter

Preise

Status

Verpackung

Parameter

Parameters / Models	74ALVCH162244GRG4	SN74ALVCH162244DGGR	SN74ALVCH162244DL	SN74ALVCH162244DLR	SN74ALVCH162244GR
Approx. Price (US$)		0.65 | 1ku
Bits	16		16	16	16
Bits(#)		16
F @ Nom Voltage(Max), Mhz	100		100	100	100
F @ Nom Voltage(Max)(Mhz)		100
ICC @ Nom Voltage(Max), mA	0.04		0.04	0.04	0.04
ICC @ Nom Voltage(Max)(mA)		0.04
Input Type		LVTTL
Operating Temperature Range, C	-40 to 85		-40 to 85	-40 to 85	-40 to 85
Operating Temperature Range(C)		-40 to 85
Output Drive (IOL/IOH)(Max), mA	-12/12		-12/12	-12/12	-12/12
Output Drive (IOL/IOH)(Max)(mA)		-12/12
Output Type		LVTTL
Package Group	TSSOP	TSSOP	SSOP	SSOP	TSSOP
Package Size: mm2:W x L, PKG	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)		48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
Package Size: mm2:W x L (PKG)		48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No
Technology Family	ALVC	ALVC	ALVC	ALVC	ALVC
VCC(Max), V	3.6		3.6	3.6	3.6
VCC(Max)(V)		3.6
VCC(Min), V	1.65		1.65	1.65	1.65
VCC(Min)(V)		1.65
Voltage(Nom), V	1.8,2.5,2.7,3.3		1.8,2.5,2.7,3.3	1.8,2.5,2.7,3.3	1.8,2.5,2.7,3.3
Voltage(Nom)(V)		1.8 2.5 2.7 3.3
tpd @ Nom Voltage(Max), ns	4.9,4.7,4.2		4.9,4.7,4.2	4.9,4.7,4.2	4.9,4.7,4.2
tpd @ Nom Voltage(Max)(ns)		4.9 4.7 4.2

Öko-Plan

Anwendungshinweise

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  The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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  Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
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  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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  PDF, 154 Kb, Revision: A, Datei veröffentlicht: Sep 8, 1999
  In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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  The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
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  PDF, 150 Kb, Datei veröffentlicht: Oct 1, 1996
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  PDF, 89 Kb, Revision: B, Datei veröffentlicht: Jun 1, 1997
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  Input and Output Characteristics of Digital Integrated Circuits
  PDF, 1.7 Mb, Datei veröffentlicht: Oct 1, 1996
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• Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver