Datasheet Texas Instruments SN74ALS112A — Datenblatt

HerstellerTexas Instruments
SerieSN74ALS112A
Datasheet Texas Instruments SN74ALS112A

Dual JK Negative-Edge-Triggered Flip-Flops mit Clear und Preset

Datenblätter

Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset datasheet
PDF, 988 Kb, Revision: A, Datei veröffentlicht: Dec 1, 1994
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Preise

Status

SN74ALS112ADSN74ALS112ADRSN74ALS112ANSN74ALS112AN3SN74ALS112ANSR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

Verpackung

SN74ALS112ADSN74ALS112ADRSN74ALS112ANSN74ALS112AN3SN74ALS112ANSR
N12345
Pin1616161616
Package TypeDDNNNS
Industry STD TermSOICSOICPDIPPDIPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-G
Package QTY402500252000
CarrierTUBELARGE T&RTUBELARGE T&R
Device MarkingALS112AALS112ASN74ALS112ANALS112A
Width (mm)3.913.916.356.355.3
Length (mm)9.99.919.319.310.3
Thickness (mm)1.581.583.93.91.95
Pitch (mm)1.271.272.542.541.27
Max Height (mm)1.751.755.085.082
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Parameter

Parameters / ModelsSN74ALS112AD
SN74ALS112AD
SN74ALS112ADR
SN74ALS112ADR
SN74ALS112AN
SN74ALS112AN
SN74ALS112AN3
SN74ALS112AN3
SN74ALS112ANSR
SN74ALS112ANSR
Approx. Price (US$)0.44 | 1ku0.44 | 1ku
Bits222
Bits(#)22
F @ Nom Voltage(Max), Mhz757575
F @ Nom Voltage(Max)(Mhz)7575
ICC @ Nom Voltage(Max), mA4.54.54.5
ICC @ Nom Voltage(Max)(mA)4.54.5
Input TypeTTL
Output Drive (IOL/IOH)(Max), mA-0.4/8-0.4/8-0.4/8
Output Drive (IOL/IOH)(Max)(mA)-0.4/8-0.4/8
Output TypeTTL
Package GroupSOICSOICPDIPPDIPSO
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)16SO: 80 mm2: 7.8 x 10.2(SO)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyALSALSALSALSALS
VCC(Max), V5.55.55.5
VCC(Max)(V)5.55.5
VCC(Min), V4.54.54.5
VCC(Min)(V)4.54.5
Voltage(Nom), V555
Voltage(Nom)(V)55
tpd @ Nom Voltage(Max), ns181818
tpd @ Nom Voltage(Max)(ns)1818

Öko-Plan

SN74ALS112ADSN74ALS112ADRSN74ALS112ANSN74ALS112AN3SN74ALS112ANSR
RoHSCompliantCompliantCompliantNot CompliantCompliant
Pb FreeYesNoYes

Anwendungshinweise

  • Advanced Schottky (ALS and AS) Logic Families
    PDF, 1.9 Mb, Datei veröffentlicht: Aug 1, 1995
    This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t

Modellreihe

Herstellerklassifikation

  • Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop