Datasheet Texas Instruments SN74ACT8997DWR — Datenblatt
| Hersteller | Texas Instruments |
| Serie | SN74ACT8997 |
| Artikelnummer | SN74ACT8997DWR |
Scan-Pfad-Linker mit 4-Bit-Identifikationsbussen Scan-gesteuerte TAP-Verkettungen 28-SOIC 0 bis 70
Datenblätter
Scan Path Linkers With 4-Bit Identification Buses Scan-Controlled IEEE Std datasheet
PDF, 1.0 Mb, Revision: D, Datei veröffentlicht: Dec 1, 1996
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Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Verpackung
| Pin | 28 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Device Marking | ACT8997 |
| Width (mm) | 7.5 |
| Length (mm) | 17.9 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Herunterladen |
Öko-Plan
| RoHS | Compliant |
Anwendungshinweise
- Programming CPLDs Via the 'LVT8986 LASPPDF, 819 Kb, Datei veröffentlicht: Nov 1, 2005
This application report summarizes key information required for understanding the 'LVT8986 linking addressable scan ports (LASPs) multidrop addressable IEEE Std 1149.1 (JTAG) test access port (TAP) transceiver. This report includes information about the 'LVT8986 secondary TAPs, bypass and linking shadow protocol, scan-path description languages, serial vector format files, and an example of how to
Modellreihe
Serie: SN74ACT8997 (2)
- SN74ACT8997DW SN74ACT8997DWR
Herstellerklassifikation
- Semiconductors > Logic > Specialty Logic > Boundary Scan (JTAG) Logic