Datasheet Texas Instruments SN65LVELT22DR — Datenblatt
Hersteller | Texas Instruments |
Serie | SN65LVELT22 |
Artikelnummer | SN65LVELT22DR |
3.3V Dual LVTTL zu Differential LVPECL Translator 8-SOIC -40 bis 85
Datenblätter
3.3 V Dual LVTTL to Differential LVPECL Translator datasheet
PDF, 788 Kb, Datei veröffentlicht: Dec 12, 2008
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Preise
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Verpackung
Pin | 8 |
Package Type | D |
Industry STD Term | SOIC |
JEDEC Code | R-PDSO-G |
Package QTY | 2500 |
Carrier | LARGE T&R |
Device Marking | LVEL22 |
Width (mm) | 3.91 |
Length (mm) | 4.9 |
Thickness (mm) | 1.58 |
Pitch (mm) | 1.27 |
Max Height (mm) | 1.75 |
Mechanical Data | Herunterladen |
Parameter
Device Type | Buffer |
Function | Translator |
ICC(Max) | 33 mA |
Input Signal | LVTTL |
No. of Rx | 2 |
No. of Tx | 2 |
Operating Temperature Range | -40 to 85 C |
Output Signal | LVPECL |
Package Group | SOIC |
Package Size: mm2:W x L | 8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG |
Protocols | PECL |
Signaling Rate | 3500 Mbps |
Öko-Plan
RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: SN65LVELT22EVM
SN65LVELT22 Evaluation Module
Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available)
Modellreihe
Serie: SN65LVELT22 (4)
- SN65LVELT22D SN65LVELT22DGK SN65LVELT22DGKR SN65LVELT22DR
Herstellerklassifikation
- Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points