Datasheet Texas Instruments SN65LVDS32BDG4 — Datenblatt

SN65LVDS32B, SN65LVDT32B
SN65LVDS3486B, SN65LVDT3486B
SN65LVDS9637B, SN65LVDT9637B
www.ti.com SLLS440B – OCTOBER 2000 – REVISED APRIL 2007 HIGH-SPEED DIFFERENTIAL RECEIVERS
FEATURES Meets or Exceeds the Requirements of ANSI
EIA/TIA-644 Standard for Signaling Rates (1) up
to 400 Mbps
Operates With a Single 3.3-V Supply
–2-V to 4.4-V Common-Mode Input Voltage
Range
Differential Input Thresholds B + 80 mV
+
_
Failsafe B > A + 80 mV
+
_ Window Comparator Figure 13. Receiver With Terminated Failsafe ECL/PECL-to-LVTTL CONVERSION WITH TI's LVDS RECEIVER
The various versions of emitter-coupled logic (i.e., ECL, PECL and LVPECL) are often the physical layer of
choice for system designers. Designers know of the established technology and that it is capable of high-speed
data transmission. In the past, system requirements often forced the selection of ECL. Now technologies like
LVDS provide designers with another alternative. While the total exchange of ECL for LVDS may not be a
design option, designers have been able to take advantage of LVDS by implementing a small resistor divider
network at the input of the LVDS receiver. TI has taken the next step by introducing a wide common-mode
LVDS receiver (no divider network required) which can be connected directly to an ECL driver with only the …