Datasheet Texas Instruments SN65LVDS32 — Datenblatt

HerstellerTexas Instruments
SerieSN65LVDS32
Datasheet Texas Instruments SN65LVDS32

Quad LVDS Empfänger

Datenblätter

SNx5LVDS32, SN65LVDS3486, SN65LVDS9637 High-Speed Differential Line Receivers datasheet
PDF, 1.9 Mb, Revision: R, Datei veröffentlicht: Aug 6, 2014
Auszug aus dem Dokument

Preise

Status

SN65LVDS32DSN65LVDS32DG4SN65LVDS32DRSN65LVDS32DRG4SN65LVDS32NSRSN65LVDS32PWSN65LVDS32PWG4SN65LVDS32PWRSN65LVDS32PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNoNoNoNoYesNoYes

Verpackung

SN65LVDS32DSN65LVDS32DG4SN65LVDS32DRSN65LVDS32DRG4SN65LVDS32NSRSN65LVDS32PWSN65LVDS32PWG4SN65LVDS32PWRSN65LVDS32PWRG4
N123456789
Pin161616161616161616
Package TypeDDDDNSPWPWPWPW
Industry STD TermSOICSOICSOICSOICSOPTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY40402500250020009020002000
CarrierTUBETUBELARGE T&RLARGE T&RLARGE T&RTUBELARGE T&RLARGE T&R
Device MarkingLVDS32LVDS32LVDS32LVDS32LVDS32LVDS32LVDS32LVDS32
Width (mm)3.913.913.913.915.34.44.44.44.4
Length (mm)9.99.99.99.910.35555
Thickness (mm)1.581.581.581.581.951111
Pitch (mm)1.271.271.271.271.27.65.65.65.65
Max Height (mm)1.751.751.751.7521.21.21.21.2
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsSN65LVDS32D
SN65LVDS32D
SN65LVDS32DG4
SN65LVDS32DG4
SN65LVDS32DR
SN65LVDS32DR
SN65LVDS32DRG4
SN65LVDS32DRG4
SN65LVDS32NSR
SN65LVDS32NSR
SN65LVDS32PW
SN65LVDS32PW
SN65LVDS32PWG4
SN65LVDS32PWG4
SN65LVDS32PWR
SN65LVDS32PWR
SN65LVDS32PWRG4
SN65LVDS32PWRG4
Approx. Price (US$)1.35 | 1ku
Device TypeReceiverReceiverReceiverReceiverReceiverReceiverReceiverReceiver
ESD HBM, kV88888888
ESD HBM(kV)8
FunctionReceiverReceiverReceiverReceiverReceiverReceiverReceiverReceiverReceiver
ICC(Max), mA1818181818181818
ICC(Max)(mA)18
Input SignalLVDSLVDSLVDSLVDSLVDSLVDSLVDSLVDSLVDS
No. of Rx444444444
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output SignalLVTTLLVTTLLVTTLLVTTLLVTTLLVTTLLVTTLLVTTLLVTTL
Package GroupSOICSOICSOICSOICSOTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SO: 80 mm2: 7.8 x 10.2(SO)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Package Size: mm2:W x L (PKG)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
ProtocolsLVDSLVDSLVDSLVDSLVDSLVDSLVDSLVDS
RatingCatalog
Signaling Rate, Mbps100100100100100100100100
Signaling Rate(Mbps)100

Öko-Plan

SN65LVDS32DSN65LVDS32DG4SN65LVDS32DRSN65LVDS32DRG4SN65LVDS32NSRSN65LVDS32PWSN65LVDS32PWG4SN65LVDS32PWRSN65LVDS32PWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantNot CompliantCompliantCompliant
Pb FreeNo

Anwendungshinweise

  • Performance of LVDS with Different Cables (Rev. B)
    PDF, 246 Kb, Revision: B, Datei veröffentlicht: Feb 11, 2002
    This application report focuses on cable for use with LVDS devices rather than printed-circuit board interconnections. After a brief introduction to LVDS, the signal quality of seven different cables is evaluated using eye pattern measurements and TI's LVDS evaluation modules (EVMs). Since data transmission cable covers a wide range of cost and performance, this paper provides guidance for cable s
  • LVDS Multidrop Connections (Rev. A)
    PDF, 809 Kb, Revision: A, Datei veröffentlicht: Feb 11, 2002
    This application report describes design considerations for low-voltage differential swing (LVDS) multidrop connections. The report describes the maximum number of receivers possible versus signaling rate, signal quality, line length, output jitter, and common-mode voltage range when multidrop testing on a single LVDS line driver transmitting to numerous daisy-chained LVDS receivers.The LVDS rec

Modellreihe

Herstellerklassifikation

  • Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)