Datasheet Texas Instruments SN54S112 — Datenblatt

HerstellerTexas Instruments
SerieSN54S112
Datasheet Texas Instruments SN54S112

Dual JK Negative-Edge-Triggered Flip-Flops mit Preset und Clear

Datenblätter

Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear datasheet
PDF, 1.3 Mb, Datei veröffentlicht: Mar 1, 1988
Auszug aus dem Dokument

Preise

Status

JM38510/07102BEAJM38510/07102BFAM38510/07102BEAM38510/07102BFASN54S112JSNJ54S112FKSNJ54S112JSNJ54S112W
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNo

Verpackung

JM38510/07102BEAJM38510/07102BFAM38510/07102BEAM38510/07102BFASN54S112JSNJ54S112FKSNJ54S112JSNJ54S112W
N12345678
Pin1616161616201616
Package TypeJWJWJFKJW
Industry STD TermCDIPCFPCDIPCFPCDIPLCCCCDIPCFP
JEDEC CodeR-GDIP-TR-GDFP-FR-GDIP-TR-GDFP-FR-GDIP-TS-CQCC-NR-GDIP-TR-GDFP-F
Package QTY11111111
CarrierTUBETUBETUBETUBETUBETUBETUBETUBE
Device MarkingJM38510/07102B07102BFAJM38510/07102B07102BFASN54S112JSNJ54SSNJ54S112JSNJ54S112W
Width (mm)6.926.736.926.736.928.896.926.73
Length (mm)19.5610.319.5610.319.568.8919.5610.3
Thickness (mm)4.571.654.571.654.571.834.571.65
Pitch (mm)2.541.272.541.272.541.272.541.27
Max Height (mm)5.082.035.082.035.082.035.082.03
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Öko-Plan

JM38510/07102BEAJM38510/07102BFAM38510/07102BEAM38510/07102BFASN54S112JSNJ54S112FKSNJ54S112JSNJ54S112W
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Anwendungshinweise

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, Datei veröffentlicht: Feb 6, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers