Datasheet Texas Instruments 5962-9681001QXA — Datenblatt

HerstellerTexas Instruments
SerieSN54LVTH16373
Artikelnummer5962-9681001QXA
Datasheet Texas Instruments 5962-9681001QXA

3,3 V ABT 16-Bit-Latches vom transparenten D-Typ mit 3-Zustands-Ausgängen 48-CFP -55 bis 125

Datenblätter

SN54LVTH16373, SN74LVTH16373 datasheet
PDF, 944 Kb, Revision: P, Datei veröffentlicht: Nov 1, 2006
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Preise

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Verpackung

Pin48484848
Package TypeWDWDWDWD
Industry STD TermCFPCFPCFPCFP
JEDEC CodeR-GDFP-FR-GDFP-FR-GDFP-FR-GDFP-F
Package QTY1111
CarrierTUBETUBETUBETUBE
Device Marking5962-9681001QXSNJ54LVTH16373AWD
Width (mm)9.669.669.669.66
Length (mm)15.8815.8815.8815.88
Thickness (mm)2.482.482.482.48
Pitch (mm).635.635.635.635
Max Height (mm)3.053.053.053.05
Mechanical DataHerunterladenHerunterladenHerunterladenHerunterladen

Parameter

3-State OutputYes
Bits16
F @ Nom Voltage(Max)160 Mhz
ICC @ Nom Voltage(Max)5 mA
Input TypeTTL
Operating Temperature Range-55 to 125 C
Output Drive (IOL/IOH)(Max)64/-12 mA
Output TypeTTL
Package GroupCFP
Package Size: mm2:W x LSee datasheet (CFP) PKG
RatingMilitary
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
tpd @ Nom Voltage(Max)3.8 ns

Öko-Plan

RoHSSee ti.com

Anwendungshinweise

  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, Datei veröffentlicht: Oct 1, 1996
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  • LVT Family Characteristics (Rev. A)
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    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Datei veröffentlicht: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, Datei veröffentlicht: May 1, 1996
  • Power-Up Behavior of Clocked Devices (Rev. A)
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  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, Datei veröffentlicht: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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    PDF, 150 Kb, Datei veröffentlicht: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
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    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
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    PDF, 105 Kb, Revision: A, Datei veröffentlicht: Aug 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
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    PDF, 614 Kb, Revision: C, Datei veröffentlicht: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, Datei veröffentlicht: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, Datei veröffentlicht: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revision: D, Datei veröffentlicht: Jun 23, 2016

Modellreihe

Serie: SN54LVTH16373 (2)

Herstellerklassifikation

  • Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers

Andere Namen:

59629681001QXA, 5962 9681001QXA