Datasheet Texas Instruments LMK61PD0A2 — Datenblatt
Hersteller | Texas Instruments |
Serie | LMK61PD0A2 |
Ultra-Low Jitter Pin wählbar, Differentialoszillator, +/- 50ppm
Datenblätter
LMK61PD0A2 Ultra-Low Jitter Pin Selectable Oscillator datasheet
PDF, 1.1 Mb, Revision: A, Datei veröffentlicht: Nov 3, 2015
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Preise
Status
LMK61PD0A2-SIAR | LMK61PD0A2-SIAT | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes |
Verpackung
LMK61PD0A2-SIAR | LMK61PD0A2-SIAT | |
---|---|---|
N | 1 | 2 |
Pin | 8 | 8 |
Package Type | SIA | SIA |
Industry STD Term | QFM | QFM |
JEDEC Code | R-PSIP-N | R-PSIP-N |
Package QTY | 2500 | 250 |
Carrier | LARGE T&R | SMALL T&R |
Device Marking | PD0A2 | PD0A2 |
Width (mm) | 5 | 5 |
Length (mm) | 7 | 7 |
Thickness (mm) | .8 | .8 |
Pitch (mm) | 1.85 | 1.85 |
Max Height (mm) | 1.15 | 1.15 |
Mechanical Data | Herunterladen | Herunterladen |
Parameter
Parameters / Models | LMK61PD0A2-SIAR | LMK61PD0A2-SIAT |
---|---|---|
Additional Features | 7x5mm | 7x5mm |
Jitter, ps | 0.1 | 0.1 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Output Frequency(Max), MHz | 312.5 | 312.5 |
Output Level | HCSL,LVDS,LVPECL | HCSL,LVDS,LVPECL |
Pin/Package | 8QFM | 8QFM |
Rating | Catalog | Catalog |
Special Features | Pin Selectable | Pin Selectable |
Stability, ppm | 50 | 50 |
VCC Core, V | 3.3 | 3.3 |
Öko-Plan
LMK61PD0A2-SIAR | LMK61PD0A2-SIAT | |
---|---|---|
RoHS | Compliant | Compliant |
Modellreihe
Serie: LMK61PD0A2 (2)
Herstellerklassifikation
- Semiconductors> Clock and Timing> Clock Oscillators