Datasheet Texas Instruments LMK04828 — Datenblatt

HerstellerTexas Instruments
SerieLMK04828
Datasheet Texas Instruments LMK04828

Ultra Low Jitter Synthesizer und Jitter Cleaner

Datenblätter

LMK0482x Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs datasheet
PDF, 2.8 Mb, Revision: AR, Datei veröffentlicht: Dec 8, 2015
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Preise

Status

LMK04828BISQ/NOPBLMK04828BISQE/NOPBLMK04828BISQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNo

Verpackung

LMK04828BISQ/NOPBLMK04828BISQE/NOPBLMK04828BISQX/NOPB
N123
Pin646464
Package TypeNKDNKDNKD
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002502000
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingK04828BISQK04828BISQK04828BISQ
Width (mm)999
Length (mm)999
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataHerunterladenHerunterladenHerunterladen

Parameter

Parameters / ModelsLMK04828BISQ/NOPB
LMK04828BISQ/NOPB
LMK04828BISQE/NOPB
LMK04828BISQE/NOPB
LMK04828BISQX/NOPB
LMK04828BISQX/NOPB
Number of Inputs333
Number of Outputs151515
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Frequency(Max), MHz308030803080
Output Frequency(Min), MHz0.2890.2890.289
Output LevelHSDS,LCPECL,LVCMOS,LVDS,LVPECLHSDS,LCPECL,LVCMOS,LVDS,LVPECLHSDS,LCPECL,LVCMOS,LVDS,LVPECL
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG64WQFN: 81 mm2: 9 x 9(WQFN)64WQFN: 81 mm2: 9 x 9(WQFN)64WQFN: 81 mm2: 9 x 9(WQFN)
RMS Jitter0.0880.0880.088
RatingCatalogCatalogCatalog
Special Features105C PCB temp,Holdover mode,Int. xtal oscillator,JESD204B SYSREF Generation,Manual/auto switch,SPI,uWire105C PCB temp,Holdover mode,Int. xtal oscillator,JESD204B SYSREF Generation,Manual/auto switch,SPI,uWire105C PCB temp,Holdover mode,Int. xtal oscillator,JESD204B SYSREF Generation,Manual/auto switch,SPI,uWire
Supply Voltage(Max), V3.453.453.45
Supply Voltage(Min), V3.153.153.15
VCO Frequency(Max), MHz308030803080
VCO Frequency(Min), MHz237023702370

Öko-Plan

LMK04828BISQ/NOPBLMK04828BISQE/NOPBLMK04828BISQX/NOPB
RoHSCompliantCompliantCompliant

Anwendungshinweise

  • LMK04828 as a Clock Source for the ADS42JB69
    PDF, 1.4 Mb, Datei veröffentlicht: Nov 14, 2012
    ADS42JB69, ADS42LB69, LMK04828 LMK04828 as a clock source for the ADS42JB69
  • When is the JESD204B interface the right choice?
    PDF, 97 Kb, Datei veröffentlicht: Jan 22, 2014
  • JESD204B multi-device synchronization: Breaking down the requirements
    PDF, 146 Kb, Datei veröffentlicht: Apr 28, 2015
  • RF Sampling ADC with 800MHz of IBW LTE
    PDF, 846 Kb, Datei veröffentlicht: Sep 8, 2016
  • Analog Applications Journal 2Q 2015
    PDF, 2.5 Mb, Datei veröffentlicht: Apr 28, 2015

Modellreihe

Herstellerklassifikation

  • Semiconductors> Clock and Timing> Clock Jitter Cleaners> Dual / Cascaded PLL