Datasheet Texas Instruments ISO5852S — Datenblatt

HerstellerTexas Instruments
SerieISO5852S
Datasheet Texas Instruments ISO5852S

Split O / P mit 5,7 kVeff, verstärkter isolierter IGBT-Gate-Treiber

Datenblätter

ISO5852S High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features datasheet
PDF, 1.2 Mb, Revision: B, Datei veröffentlicht: Jan 16, 2017
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Preise

Status

ISO5852SDWISO5852SDWR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYes

Verpackung

ISO5852SDWISO5852SDWR
N12
Pin1616
Package TypeDWDW
Industry STD TermSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY402000
CarrierTUBELARGE T&R
Device MarkingISO5852SISO5852S
Width (mm)7.57.5
Length (mm)10.310.3
Thickness (mm)2.352.35
Pitch (mm)1.271.27
Max Height (mm)2.652.65
Mechanical DataHerunterladenHerunterladen

Parameter

Parameters / ModelsISO5852SDW
ISO5852SDW
ISO5852SDWR
ISO5852SDWR
DIN V VDE V 0884-10 Working Voltage, Vpk21212121
DIN V VDE V 0884-10 Transient Overvoltage Rating, Vpk80008000
Enable/Disable FunctionN/AN/A
Input VCC(Max), V5.55.5
Input VCC(Min), V2.252.25
Isolation Rating, Vrms57005700
Number of Channels11
Operating Temperature Range, C-40 to 125-40 to 125
Output VCC/VDD(Max), V3030
Output VCC/VDD(Min), V1515
Package GroupSOICSOIC
Package Size: mm2:W x L, PKG16SOIC: 106 mm2: 10.3 x 10.3(SOIC)16SOIC: 106 mm2: 10.3 x 10.3(SOIC)
Peak Output Current, A55
Power SwitchIGBT,SiCFETIGBT,SiCFET
Prop Delay, ns7676
Prop Delay(Max), ns110110

Öko-Plan

ISO5852SDWISO5852SDWR
RoHSCompliantCompliant

Anwendungshinweise

  • Common-mode transient immunity for isolated gate drivers
    PDF, 152 Kb, Datei veröffentlicht: Oct 30, 2015
  • Pushing the envelope with high-performance digital-isolation technology
    PDF, 147 Kb, Datei veröffentlicht: Oct 30, 2015
  • 4Q 2015 Analog Applications Journal
    PDF, 1.6 Mb, Datei veröffentlicht: Oct 30, 2015
  • Shelf-Life Evaluation of Lead-Free Component Finishes
    PDF, 1.3 Mb, Datei veröffentlicht: May 24, 2004
    The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a
  • Isolation Glossary
    PDF, 52 Kb, Datei veröffentlicht: Oct 27, 2014
  • Digital Isolator Design Guide (Rev. A)
    PDF, 487 Kb, Revision: A, Datei veröffentlicht: Nov 4, 2014

Modellreihe

Serie: ISO5852S (2)

Herstellerklassifikation

  • Semiconductors> Isolation> Isolated Gate Driver