Datasheet Texas Instruments DS99R421-Q1 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DS99R421-Q1 |
5-43 MHz FPD-Link-LVDS (3 Daten + 1 Clk) zu FPD-Link II-LVDS (Embedded Clk DC-Balanced) Konv
Datenblätter
5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to FPD-Link II LVDS Converter datasheet
PDF, 859 Kb, Revision: D, Datei veröffentlicht: Apr 16, 2013
Auszug aus dem Dokument
Preise
Status
| DS99R421QSQ/NOPB | DS99R421QSQX/NOPB | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes |
Verpackung
| DS99R421QSQ/NOPB | DS99R421QSQX/NOPB | |
|---|---|---|
| N | 1 | 2 |
| Pin | 36 | 36 |
| Package Type | NJK | NJK |
| Package QTY | 250 | 2500 |
| Carrier | SMALL T&R | LARGE T&R |
| Device Marking | 99R421Q | 99R421Q |
Parameter
| Parameters / Models | DS99R421QSQ/NOPB | DS99R421QSQX/NOPB |
|---|---|---|
| Color Depth, bpp | 18 | 18 |
| Diagnostics | BIST | BIST |
| EMI Reduction | - | - |
| Function | Serializer | Serializer |
| Input Compatibility | FPD-Link LVDS | FPD-Link LVDS |
| Operating Temperature Range, C | -40 to 105 | -40 to 105 |
| Output Compatibility | FPD-Link II LVDS | FPD-Link II LVDS |
| Pixel Clock Min, MHz | 5 | 5 |
| Pixel Clock(Max), MHz | 43 | 43 |
| Rating | Automotive | Automotive |
| Signal Conditioning | Pre-Emphasis,DC Balance,VOD Select | Pre-Emphasis,DC Balance,VOD Select |
| Special Features | - | - |
| Total Throughput, Mbps | 1032 | 1032 |
Öko-Plan
| DS99R421QSQ/NOPB | DS99R421QSQX/NOPB | |
|---|---|---|
| RoHS | Compliant | Compliant |
Anwendungshinweise
- AN-1807 FPD-Link II Display SerDes Overview (Rev. B)PDF, 45 Kb, Revision: B, Datei veröffentlicht: Apr 26, 2013
TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s - LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
Modellreihe
Serie: DS99R421-Q1 (2)
Herstellerklassifikation
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes