Datasheet Texas Instruments DS99R124QSQE/NOPB — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DS99R124Q-Q1 |
| Artikelnummer | DS99R124QSQE/NOPB |
5 - 43 MHz 18-Bit-Farbkonverter von FPD-Link II zu FPD-Link 48-WQFN -40 bis 105
Datenblätter
DS99R124Q 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter datasheet
PDF, 815 Kb, Revision: D, Datei veröffentlicht: Apr 16, 2013
Auszug aus dem Dokument
Preise
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Verpackung
| Pin | 48 |
| Package Type | RHS |
| Industry STD Term | WQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 250 |
| Carrier | SMALL T&R |
| Device Marking | DS99R124Q |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | .75 |
| Pitch (mm) | .5 |
| Max Height (mm) | .8 |
| Mechanical Data | Herunterladen |
Parameter
| Color Depth | 18 bpp |
| Diagnostics | BIST |
| EMI Reduction | SSCG,LVDS Outputs |
| Function | Deserializer |
| Input Compatibility | FPD-Link II LVDS |
| Operating Temperature Range | -40 to 105 C |
| Output Compatibility | FPD-Link LVDS |
| Package Group | WQFN |
| Package Size: mm2:W x L | 48WQFN: 49 mm2: 7 x 7(WQFN) PKG |
| Pixel Clock Min | 5 MHz |
| Pixel Clock(Max) | 43 MHz |
| Rating | Automotive |
| Signal Conditioning | Equalizer |
| Special Features | I2C Config |
| Total Throughput | 1200 Mbps |
Öko-Plan
| RoHS | Compliant |
Design Kits und Evaluierungsmodule
- Evaluation Modules & Boards: DS99R124Q-EVK
DS99R124Q-EVK FPD-Link II to FPD-Link Converter Evaluation Kit
Lifecycle Status: Active (Recommended for new designs)
Anwendungshinweise
- AN-1807 FPD-Link II Display SerDes Overview (Rev. B)PDF, 45 Kb, Revision: B, Datei veröffentlicht: Apr 26, 2013
TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s - LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
Modellreihe
Serie: DS99R124Q-Q1 (3)
- DS99R124QSQ/NOPB DS99R124QSQE/NOPB DS99R124QSQX/NOPB
Herstellerklassifikation
- Semiconductors > Interface > FPD-Link SerDes > Display SerDes