Datasheet Texas Instruments DS90UR907Q-Q1 — Datenblatt

HerstellerTexas Instruments
SerieDS90UR907Q-Q1
Datasheet Texas Instruments DS90UR907Q-Q1

5 - 65 MHz 24-Bit-Farbkonverter von FPD-Link zu FPD-Link II

Datenblätter

DS90UR907Q-Q1 5 to 65-MHz, 24-Bit Color FPD-Link to FPD-Link II Converter datasheet
PDF, 1.2 Mb, Revision: G, Datei veröffentlicht: Dec 31, 2015
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Preise

Status

DS90UR907QSQ/NOPBDS90UR907QSQE/NOPBDS90UR907QSQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesNo

Verpackung

DS90UR907QSQ/NOPBDS90UR907QSQE/NOPBDS90UR907QSQX/NOPB
N123
Pin363636
Package TypeNJKNJKNJK
Package QTY10002502500
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingUR907QSQUR907QSQUR907QSQ

Parameter

Parameters / ModelsDS90UR907QSQ/NOPB
DS90UR907QSQ/NOPB
DS90UR907QSQE/NOPB
DS90UR907QSQE/NOPB
DS90UR907QSQX/NOPB
DS90UR907QSQX/NOPB
Color Depth, bpp242424
DiagnosticsBIST,I2C BusBIST,I2C BusBIST,I2C Bus
EMI ReductionLVDS InputsLVDS InputsLVDS Inputs
FunctionSerializerSerializerSerializer
Input CompatibilityFPD-Link LVDSFPD-Link LVDSFPD-Link LVDS
Operating Temperature Range, C-40 to 105-40 to 105-40 to 105
Output CompatibilityFPD-Link II LVDSFPD-Link II LVDSFPD-Link II LVDS
Pixel Clock Min, MHz555
Pixel Clock(Max), MHz656565
RatingAutomotiveAutomotiveAutomotive
Signal ConditioningDe-Emphasis,VOD SelectDe-Emphasis,VOD SelectDe-Emphasis,VOD Select
Special Features1.8V or 3.3V VDDIO,I2C Config1.8V or 3.3V VDDIO,I2C Config1.8V or 3.3V VDDIO,I2C Config
Total Throughput, Mbps156015601560

Öko-Plan

DS90UR907QSQ/NOPBDS90UR907QSQE/NOPBDS90UR907QSQX/NOPB
RoHSCompliantCompliantCompliant

Anwendungshinweise

  • AN-1807 FPD-Link II Display SerDes Overview (Rev. B)
    PDF, 45 Kb, Revision: B, Datei veröffentlicht: Apr 26, 2013
    TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s
  • LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
    PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
    This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
  • Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
    PDF, 118 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
    TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.

Modellreihe

Herstellerklassifikation

  • Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes