Datasheet Texas Instruments DS90UR906Q-Q1 — Datenblatt
| Hersteller | Texas Instruments |
| Serie | DS90UR906Q-Q1 |
24-Bit-Farb-FPD-Link II-Deserializer mit 5-65 MHz
Datenblätter
DS90UR90xQ-Q1 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer datasheet
PDF, 1.6 Mb, Revision: H, Datei veröffentlicht: Jul 31, 2015
Auszug aus dem Dokument
Preise
Status
| DS90UR906QSQ/NOPB | DS90UR906QSQE/NOPB | DS90UR906QSQX/NOPB | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | Yes |
Verpackung
| DS90UR906QSQ/NOPB | DS90UR906QSQE/NOPB | DS90UR906QSQX/NOPB | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 60 | 60 | 60 |
| Package Type | NKB | NKB | NKB |
| Industry STD Term | WQFN | WQFN | WQFN |
| JEDEC Code | S-PQSO-N | S-PQSO-N | S-PQSO-N |
| Package QTY | 1000 | 250 | 2000 |
| Carrier | LARGE T&R | SMALL T&R | LARGE T&R |
| Device Marking | UR906QSQ | UR906QSQ | UR906QSQ |
| Width (mm) | 9 | 9 | 9 |
| Length (mm) | 9 | 9 | 9 |
| Thickness (mm) | .8 | .8 | .8 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | .8 | .8 | .8 |
| Mechanical Data | Herunterladen | Herunterladen | Herunterladen |
Parameter
| Parameters / Models | DS90UR906QSQ/NOPB | DS90UR906QSQE/NOPB | DS90UR906QSQX/NOPB |
|---|---|---|---|
| Color Depth, bpp | 24 | 24 | 24 |
| Diagnostics | BIST,I2C Bus | BIST,I2C Bus | BIST,I2C Bus |
| EMI Reduction | SSCG,RDS,Progressive Turn On (PTO) | SSCG,RDS,Progressive Turn On (PTO) | SSCG,RDS,Progressive Turn On (PTO) |
| Function | Deserializer | Deserializer | Deserializer |
| Input Compatibility | FPD-Link II LVDS | FPD-Link II LVDS | FPD-Link II LVDS |
| Operating Temperature Range, C | -40 to 105 | -40 to 105 | -40 to 105 |
| Output Compatibility | LVCMOS | LVCMOS | LVCMOS |
| Package Group | WQFN | WQFN | WQFN |
| Package Size: mm2:W x L, PKG | 60WQFN: 81 mm2: 9 x 9(WQFN) | 60WQFN: 81 mm2: 9 x 9(WQFN) | 60WQFN: 81 mm2: 9 x 9(WQFN) |
| Pixel Clock Min, MHz | 5 | 5 | 5 |
| Pixel Clock(Max), MHz | 65 | 65 | 65 |
| Rating | Automotive | Automotive | Automotive |
| Signal Conditioning | Equalizer | Equalizer | Equalizer |
| Special Features | 1.8V or 3.3V VDDIO,I2C Config | 1.8V or 3.3V VDDIO,I2C Config | 1.8V or 3.3V VDDIO,I2C Config |
| Total Throughput, Mbps | 1560 | 1560 | 1560 |
Öko-Plan
| DS90UR906QSQ/NOPB | DS90UR906QSQE/NOPB | DS90UR906QSQX/NOPB | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Anwendungshinweise
- AN-1807 FPD-Link II Display SerDes Overview (Rev. B)PDF, 45 Kb, Revision: B, Datei veröffentlicht: Apr 26, 2013
TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s - LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
Modellreihe
Serie: DS90UR906Q-Q1 (3)
Herstellerklassifikation
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes