Datasheet Texas Instruments DS90UR124QVS/NOPB — Datenblatt

Hersteller	Texas Instruments
Serie	DS90UR124-Q1
Artikelnummer	DS90UR124QVS/NOPB

5-43 MHz DC-symmetrischer 24-Bit-FPD-Link II-Deserializer 64-TQFP -40 bis 105

Datenblätter

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PDF, 1.4 Mb, Revision: O, Datei veröffentlicht: Apr 29, 2015

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Preise

Status

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

Verpackung

Pin	64	64
Package Type	PAG	PAG
Industry STD Term	TQFP	TQFP
JEDEC Code	S-PQFP-G	S-PQFP-G
Package QTY	160	160
Device Marking	QVS	DS90UR124
Width (mm)	10	10
Length (mm)	10	10
Thickness (mm)	1	1
Pitch (mm)	.5	.5
Max Height (mm)	1.2	1.2
Mechanical Data	Herunterladen	Herunterladen

Parameter

Color Depth	18 bpp
Diagnostics	BIST
EMI Reduction	Adjustable Progressive Turn On (PTO),Slew Rate Control
Function	Deserializer
Input Compatibility	FPD-Link II LVDS
Operating Temperature Range	-40 to 105 C
Output Compatibility	LVCMOS
Package Group	TQFP
Package Size: mm2:W x L	64TQFP: 144 mm2: 12 x 12(TQFP) PKG
Pixel Clock Min	5 MHz
Pixel Clock(Max)	43 MHz
Rating	Automotive
Signal Conditioning	-
Special Features	-
Total Throughput	1032 Mbps

Öko-Plan

RoHS

Compliant

Design Kits und Evaluierungsmodule

Evaluation Modules & Boards: SERDESUR-43USB
Evaluation Kit for DS90UR241 DS90UR124 Serializer and Deserializer Chipset
Lifecycle Status: Active (Recommended for new designs)
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Anwendungshinweise

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AN-2068 DS90UR241/124 Spread Spectrum Tolerance Support (Rev. B)
PDF, 70 Kb, Revision: B, Datei veröffentlicht: Apr 26, 2013
Compliance to EMI limits is often a challenge. Spread spectrum clocking is commonly used to minimize EMI. The effect of modulating periodic signals, both clock and data, reduces the peak emissions by spreading the energy over a range of frequencies. The DS90UR241 and DS90UR124 chipset allows the use of spread spectrum clock and data inputs. The following is a discussion of spread spectrum clock ch
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AN-1807 FPD-Link II Display SerDes Overview (Rev. B)
PDF, 45 Kb, Revision: B, Datei veröffentlicht: Apr 26, 2013
TIвЂ™s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s
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LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
PDF, 101 Kb, Revision: A, Datei veröffentlicht: Apr 29, 2013
This application note introduces Texas InstrumentвЂ™s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
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Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
PDF, 118 Kb, Revision: A, Datei veröffentlicht: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
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DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
PDF, 170 Kb, Revision: E, Datei veröffentlicht: Apr 29, 2013
Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of todayвЂ™s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

Modellreihe

Serie: DS90UR124-Q1 (2)

DS90UR124QVS/NOPB DS90UR124QVSX/NOPB

Herstellerklassifikation

Semiconductors > Interface > FPD-Link SerDes > Display SerDes